CY7C1041G30-10ZSXI
SRAM Chip Async Single 3V 4M-Bit 256K x 16 10ns 44-Pin TSOP-II Tray
CY7C1041G30-10ZSXI is a high-performance CMOS fast static RAM device with embedded ECC. It includes an ERR pin that signals an error detection and correction event during a read cycle. Data writes are performed by asserting the chip enable (active-low CE) and write enable (active-low WE) inputs LOW, while providing the data on I/O0 through I/O15 and address on A0 through A17 pins. Data reads are performed by asserting the chip enable (active-low CE) and output enable (active-low OE) inputs LOW and providing the required address on the address lines. The detection and correction of a single-bit error in the accessed location is indicated by the assertion of the ERR output (ERR=HIGH).
- Embedded ECC for single-bit error correction
- Active current ICC is 38mA typical
- Standby current ISB2 is 6mA typical
- 1.0V data retention
- TTL-compatible inputs and outputs
- Error indication (ERR) pin to indicate 1-bit error detection and correction
- 2.2V to 3.6V voltage range
- High speed, tAA=10ns
- 44-pin TSOP II package
- Industrial ambient temperature range from -40°C to +85°C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 18 Bit | ||
| 4 Mbit | ||
| TSOP-II | ||
| Surface Mount | ||
| 260 | ||
| 45 mA | ||
| 10 ns | ||
| 256K x 16bit | ||
| 4 Mbit | ||
| Surface Mount | ||
| MSL 3 - 168 hours | ||
| 44 | ||
| 16 Bit | ||
| 16 Bit | ||
| 1 | ||
| 256 kWords | ||
| -40 to 85 °C | ||
| 85 °C | ||
| -40 °C | ||
| 44TSOP-II | ||
| 44 | ||
| 18.517(Max) x 10.262(Max) x 1.044(Max) | ||
| No | ||
| Industrial | ||
| Asynchronous SRAM | ||
| TSOP-II | ||
| 3.6 V | ||
| 2.2 V | ||
| 3 V | ||
| 3.0000 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.2.B |
| HTSN: | 8542320041 |
| Schedule B: | 8542320040 |
Factory Lead Time: