CY62167G30-45ZXI
SRAM Chip Async Single 2.5V/3V 16M-Bit 2M/1M x 8/16 45ns 48-Pin TSOP-I Tray
CY62167G30-45ZXI is a CY62167G30 high-performance CMOS, low-power (MoBL®) SRAM device with embedded ECC. The byte high enable (BHE) and byte low enable (BLE) inputs control byte writes and write data on the corresponding I/O lines to the memory location specified. BHE controls I/O8 through I/O15 and BLE controls I/O0 through I/O7. To perform data reads, assert the output enable active-low (OE) input and provide the required address on the address lines. User can access read data on the I/O lines (I/O0 through I/O15). To perform byte accesses, assert the required byte enable signal active-low (BHE or BLE) to read either the upper byte or the lower byte of data from the specified address location.
- Ultra-low standby current, typical standby current: 1.5µA
- High speed is 45ns
- Embedded error-correcting code (ECC) for single-bit error correction
- Operating voltage range from 2.2V to 3.6V
- 1.0-V data retention
- Transistor-transistor logic (TTL) compatible inputs and outputs
- Error indication (ERR) pin to indicate 1-bit error detection and correction
- 48-pin TSOP I package
- Industrial ambient temperature range from –40°C to +85°C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 20 Bit | ||
| 16 Mbit | ||
| TSOP-I | ||
| Surface Mount | ||
| Pure Tin | ||
| 260 | ||
| 36 mA | ||
| 45 ns | ||
| 1M x 16bit | ||
| 16 Mbit | ||
| Surface Mount | ||
| MSL 3 - 168 hours | ||
| 48 | ||
| 8, 16 Bit | ||
| 1 | ||
| 2, 1 MWords | ||
| -40 to 85 °C | ||
| 85 °C | ||
| -40 °C | ||
| 48TSOP-I | ||
| 48 | ||
| 12 x 18.4 x 1.05(Max) | ||
| No | ||
| Industrial | ||
| Asynchronous SRAM | ||
| TSOP-I | ||
| 3.6 V | ||
| 2.2 V | ||
| 3 V | ||
| Asynchronous | ||
| 2.5, 3 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.2.B |
| HTSN: | 8542320041 |
| Schedule B: | 8542320070 |