CY62167ELL-45ZXI

The CY62167E is a high performance CMOS static RAM organized as 1 M words by 16-bits/2 M words by 8-bits. This device features advanced circuit design to provide an ultra low active current. This is ideal for providing More Battery LifeTM (MoBL) in portable applications. The device also has an automatic power down feature that reduces power consumption when addresses are not toggling. Place the device into standby mode when deselected. The input and output pins are placed in a high impedance state when: The device is deselected Outputs are disabled Both byte high enable and byte low enable are disabled A write operation is in progressTo write to the device, take chip enables and write enable input LOW. If byte low enable is LOW, then data from I/O pins, is written into the location specified on the address pins. If byte high enable is LOW, then data from the I/O pins is written into the location specified on the address pins. To read from the device, take chip enables and output enable LOW while forcing the write enable HIGH. If byte low enable is LOW, then data from the memory location specified by the address pins appears on I/O0 to I/O7. If byte high enable is LOW, then data from memory appears on I/O8 to I/O15.The CY62167E device is suitable for interfacing with processors that have TTL I/P levels. It is not suitable for processors that require CMOS I/P levels.

• Configurable as 1 M × 16 or as 2 M × 8 SRAM
• Very high speed: 45 ns
• Wide voltage range: 4.5 V to 5.5 V
• Ultra low standby power
  • Typical standby current: 1.5 µA
  • Maximum standby current: 12 µA
• Ultra low active power
  • Typical active current: 2.2 mA at f = 1 MHz
• Easy memory expansion with CE1, CE2, and OE features
• Automatic power-down when deselected
• CMOS for optimum speed and power
• Offered in 48-pin TSOP I package