GS880E18CGT-250I
SRAM Chip Sync Dual 2.5V/3.3V 9M-Bit 512K x 18 5.5ns/2.5ns 100-Pin TQFP Tray
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Manufacturer:Gsi Technology
Avnet Manufacturer Part #: GS880E18CGT-250I
Secondary Manufacturer Part#: GS880E18CGT-250I
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RoHS 10 Compliant -
Tariff Charges
- FT pin for user-configurable flow through or pipeline operation
- Dual Cycle Deselect (DCD) operation
- 2.5 V or 3.3 V +10%/–10% core power supply
- 2.5 V or 3.3 V I/O supply
- LBO pin for Linear or Interleaved Burst mode
- Internal input resistors on mode pins allow floating mode pins
- Default to Interleaved Pipeline mode
- Byte Write (BW) and/or Global Write (GW) operation
- Internal self-timed write cycle
- Automatic power-down for portable applications
- JEDEC-standard 100-lead TQFP package
- RoHS-compliant 100-lead TQFP package available
Technical Attributes
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| Description | Value |
|---|
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.2.B |
| HTSN: | 8542320041 |
| Schedule B: | 8542320040 |
Factory Lead Time: