GS88032CGT-150IV
SRAM Chip Sync Quad 2.5V/3.3V 9M-Bit 256K x 32 7.5ns 100-Pin TQFP Bulk
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Manufacturer:Gsi Technology
Avnet Manufacturer Part #: GS88032CGT-150IV
Secondary Manufacturer Part#: GS88032CGT-150IV
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RoHS 10 Compliant -
Tariff Charges
The GS88032CGT is a 9,437,184-bit (8,388,608-bit for x32 version) high performance synchronous SRAM with a 2-bit burst address counter. Al though of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM applications, ranging from DSP main store to networking chip set support.
- FT pin for user-configurable flow through or pipeline operation
- Single Cycle Deselect (SCD) operation
- 2.5 V or 3.3 V +10%/–10% core power supply
- 2.5 V or 3.3 V I/O supply
- LBO pin for Linear or Interleaved Burst mode
- Internal input resistors on mode pins allow floating mode pins
- Default to Interleaved Pipeline mode
- Byte Write (BW) and/or Global Write (GW) operation
- Internal self-timed write cycle
- Automatic power-down for portable applications
- JEDEC-standard 100-lead TQFP package
- RoHS-compliant 100-lead TQFP package available
- 8MB product family
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 18 Bit | ||
| Flow-Through|Pipelined | ||
| 150 MHz | ||
| SDR | ||
| 9 Mbit | ||
| 150 MHz | ||
| 160 mA | ||
| 2.7, 3.6 V | ||
| 7.5 ns | ||
| 9 Mbit | ||
| 2.3, 3 V | ||
| Surface Mount | ||
| 100 | ||
| 32 Bit | ||
| 32 Bit | ||
| 4 | ||
| 256 kWords | ||
| -40 to 85 °C | ||
| 85 °C | ||
| -40 °C | ||
| 100TQFP | ||
| 100 | ||
| 22 x 14 x 1.4 mm | ||
| 0 | ||
| Industrial | ||
| TQFP | ||
| 2.7, 3.6 V | ||
| 2.3, 3 V | ||
| 2.5, 3.3 V | ||
| Synchronous | ||
| 2.5, 3.3 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.2.B |
| HTSN: | 8542320041 |
| Schedule B: | 8542320040 |
Factory Lead Time: