GS864272C-300
SRAM Chip Sync Octal 2.5V/3.3V 72M-Bit 1M x 72-Bit 5.5ns/3ns 209-Pin FBGA Tray
Manufacturer:Gsi Technology
Avnet Manufacturer Part #: GS864272C-300
Secondary Manufacturer Part#: GS864272C-300
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RoHS 10 Compliant -
Tariff Charges
- FT pin for user-configurable flow through or pipeline operation
- Single/Dual Cycle Deselect selectable
- IEEE 1149.1 JTAG-compatible Boundary Scan
- ZQ mode pin for user-selectable high/low output drive
- 2.5 V +10%/–10% core power supply
- 3.3 V +10%/–10% core power supply
- 2.5 V or 3.3 V I/O supply
- LBO pin for Linear or Interleaved Burst mode
- Internal input resistors on mode pins allow floating mode pins
- Default to SCD x18/x36 Interleaved Pipeline mode
- Byte Write (BW) and/or Global Write (GW) operation
- Internal self-timed write cycle
- Automatic power-down for portable applications
- JEDEC-standard 119- and 209-bump BGA package
- RoHS-compliant 119- and 209-bump BGA packages available
- 4th Generation
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 20 Bit | ||
| Flow-Through|Pipelined | ||
| 300 MHz | ||
| SDR | ||
| 72 Mbit | ||
| Tin-Lead | ||
| 375@Flow-Through|520@Pipelined mA | ||
| 2.7, 3.6 V | ||
| 5.5@Flow-Through|3@Pipelined ns | ||
| 72 Mbit | ||
| 2.3, 3 V | ||
| Surface Mount | ||
| MSL 3 - 168 hours | ||
| 209 | ||
| 72 Bit | ||
| 72 Bit | ||
| 8 | ||
| 1 MWords | ||
| 0 to 70 °C | ||
| 70 °C | ||
| 0 °C | ||
| 209FBGA | ||
| 209 | ||
| 22 x 14 x 1.1 mm | ||
| No | ||
| Commercial | ||
| Synchronous SRAM | ||
| FBGA | ||
| 2.7, 3.6 V | ||
| 2.3, 3 V | ||
| 2.5, 3.3 V | ||
| Synchronous | ||
| 2.5, 3.3 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.2.B |
| HTSN: | 8542320041 |
| Schedule B: | 8542320040 |
Factory Lead Time: