GS864036GT-300
SRAM Chip Sync Quad 3.3V 72M-Bit 2M x 36 5.5ns/2.3ns 100-Pin TQFP Tray
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Manufacturer:Gsi Technology
Avnet Manufacturer Part #: GS864036GT-300
Secondary Manufacturer Part#: GS864036GT-300
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RoHS 10 Compliant -
Tariff Charges
The GS864036T is a 75,497,472-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM applications, ranging from DSP main store to networking chip set support.
- FT pin for user-configurable flow through or pipeline operation
- Single Cycle Deselect (SCD) operation
- 2.5 V or 3.3 V +10%/–10% core power supply
- 2.5 V or 3.3 V I/O supply
- LBO pin for Linear or Interleaved Burst mode
- Internal input resistors on mode pins allow floating mode pins
- Default to Interleaved Pipeline mode
- Byte Write (BW) and/or Global Write (GW) operation
- Internal self-timed write cycle
- Automatic power-down for portable applications
- JEDEC-standard 100-lead TQFP package
- RoHS-compliant 100-lead TQFP package available
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 21 Bit | ||
| Flow-Through|Pipelined | ||
| 300 MHz | ||
| SDR | ||
| 72 Mbit | ||
| Matte Tin | ||
| 260 | ||
| 300@Flow-Through|420@Pipelined mA | ||
| 5.5@Flow-Through|2.3@Pipelined ns | ||
| 72 Mbit | ||
| Surface Mount | ||
| MSL 3 - 168 hours | ||
| 100 | ||
| 36 Bit | ||
| 36 Bit | ||
| 4 | ||
| 2 MWords | ||
| 0 to 70 °C | ||
| 70 °C | ||
| 0 °C | ||
| 100TQFP | ||
| 100 | ||
| 20 x 14 x 1.4 mm | ||
| No | ||
| Commercial | ||
| Synchronous SRAM | ||
| TQFP | ||
| 3.3 V | ||
| Synchronous | ||
| 3.3000 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | 3A991.B.2.B |
| HTSN: | 8542320041 |
| Schedule B: | 8542320040 |
Factory Lead Time: