CDB42448
Evaluation Board For CS42448
- RoHS 10 Compliant
- Tariff Charges
The CDB42448 evaluation board is an excellent means for evaluating the CS42448 CODEC. Evaluation requires an analog/digital signal source and analyzer, and power supplies. A Windows PC compatible computer must be used to evaluate the CS42448.
System timing for the I²S, Left-Justified and Right-Justified interface formats can be provided by the CS42448, by the CS8416, or by a DSP I/O stake header with a DSP connected. System timing for TDM mode is provided by an FPGA using clocks derived from the CS8416 or DSP I/O header.
RCA phono jacks are provided for the CS42448 analog inputs and outputs. Digital data I/O is available via RCA phono or optical connectors to the CS8416 and CS8406.
The Windows software provides a GUI to make configuration of the CDB42448 easy. The software communicates through the PC's serial port to configure the control port registers so that all features of the CS42448 can be evaluated. The evaluation board may also be configured to accept external timing and data signals for operation in a user application during system development.
- Single-ended/Single-ended to Differential Analog Inputs
- Single-ended/Differential to Single-ended Analog Outputs
- CS8406 S/PDIF Digital Audio Transmitter
- CS8416 S/PDIF Digital Audio Receiver
- Header for Optional External Software Configuration of CS42448
- Header for External DSP Serial Audio I/O
- 3.3 V Logic Interface
- Pre-defined Software Scripts
- S/PDIF-to-TDM Conversion for Easy Evaluation of the TDM Digital Interface
- Demonstrates Recommended Layout and Grounding Arrangements
- Windows® Compatible Software Interface to Configure CS42448 and Inter-board Connections
Technical Attributes
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ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | UNKNOWN |
| ECCN: | EAR99 |
| HTSN: | 9030820000 |
| Schedule B: | 9030820000 |