BLD6G21LS-50,112

The BLD6G21LS-50 incorporate a fully integrated Doherty solution using Ampleon’s state of the art GEN6 LDMOS technology. This device is perfectly suited for TD-SCDMA base station applications at frequencies from 2010 MHz to 2025 MHz. The main and peak device, input splitter and output combiner are integrated in a single package. This package consists of one gate and drain lead and two extra leads of which one is used for biasing the peak amplifier and the other is not connected. It only requires the proper input/output match and bias setting as with a normal class-AB transistor.

• Typical TD-SCDMA performance at frequencies from 2010 MHz to 2025 MHz:
  • Average output power = 8 W
  • Power gain = 14.5 dB
  • Efficiency = 43 %
• Fully optimized integrated Doherty concept:
  • integrated asymmetrical power splitter at input
  • integrated power combiner
  • peak biasing down to 0 V
  • low junction temperature
  • high efficiency
• 100 % peak power tested for guaranteed output power capability
• Integrated ESD protection
• Good pair match (main and peak on the same chip)
• Independent control of main and peak bias
• Internally matched for ease of use
• Excellent ruggedness
• Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances (RoHS)