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XC7VX980T-L2FF1926E

FPGA, Virtex-7 Series, SRAM, 979200 Logic Cells, 720 I/Os, 1926 Pins, FCBGA

Manufacturer:AMD
Product Category: Programmable Logic, FPGAs
Avnet Manufacturer Part #: XC7VX980T-L2FF1926E
Secondary Manufacturer Part#: XC7VX980T-L2FF1926E
  • Legend Information Icon RoHS 10 Compliant
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Xilinx® 7 series FPGAs comprise three new FPGA families that address the complete range of system requirements, ranging from low cost, small form factor, cost-sensitive, high-volume applications to ultra high-end connectivity bandwidth, logic capacity, and signal processing capability for the most demanding high-performance applications. The 7 series FPGAs include:

  • Virtex®-7 Family: Optimized for highest system performance and capacity with a 2X improvement in system performance. Highest capability devices enabled by stacked silicon interconnect (SSI) technology.
  • Built on a state-of-the-art, high-performance, low-power (HPL), 28 nm, high-k metal gate (HKMG) process technology, 7 series FPGAs enable an unparalleled increase in system performance with 2.9 Tb/s of I/O bandwidth, 2 million logic cell capacity, and 5.3 TMAC/s DSP, while consuming 50% less power than previous generation devices to offer a fully programmable alternative to ASSPs and ASICs.

    • Advanced high-performance FPGA logic based on real 6-input lookup table (LUT) technology configurable as distributed memory.
    • 36 Kb dual-port block RAM with built-in FIFO logic for on-chip data buffering.
    • High-performance SelectIO™ technology with support for DDR3 interfaces up to 1,866 Mb/s.
    • High-speed serial connectivity with built-in multi-gigabit transceivers from 600 Mb/s to maximum rates of 6.6 Gb/s up to 28.05 Gb/s, offering a special low-power mode, optimized for chip-to-chip interfaces.
    • A user configurable analog interface (XADC), incorporating dual 12-bit 1MSPS analog-to-digital converters with on-chip thermal and supply sensors.
    • DSP slices with 25 x 18 multiplier, 48-bit accumulator, and pre-adder for high-performance filtering, including optimized symmetric coefficient filtering.
    • Powerful clock management tiles (CMT), combining phase-locked loop (PLL) and mixed-mode clock manager (MMCM) blocks for high precision and low

    Technical Attributes

    Find Similar Parts

    Description Value
    SRAM based FPGA
    FCBGA
    Surface Mount
    979,200, 200
    1,926
    720
    100 °C
    0 °C
    28nm (HKMG)
    Virtex-7 Series
    2L

    ECCN / UNSPSC / COO

    Description Value
    Country of Origin: RECOVERY FEE
    ECCN: 3A001.A.7.B
    HTSN: 8542390090
    Schedule B: 8542390060
    In Stock :  0
    Additional inventory
    Factory Lead Time: 154 Weeks
    Price for: Each
    Quantity:
    Min:1  Mult:1  
    USD $:
    1+
    $47910.15