EF-DI-JESD204-SITE

The LogiCORE IP JESD204 core is designed to Joint Electron Devices Engineering Council (JEDEC) JESD204B standard. The JESD204B specification describes serial data interface and the link protocol between data converters and logic devices.

This IP core supports line rates of up to 12.5 Gbps characterized to the JESD204B specification and line rates up to 16.1 Gbps not characterized to the JESD204B specification and between 1-32 lane configurations. The IP Core can be configured as JESD204 Transmitter for interfacing to DAC device or JESD204 Receiver for interfacing to ADC device. The JESD204 IP core is delivered as a netlist along with the supporting wrapper files.

• Designed to JEDEC JESD204B specification
• Supports scrambling and initial lane alignment
• Supports 1-256 Octets per frame and 1-32 frames per multi-frame
• Supports 1 to 32 lane configurations
• Supports line rates up to 12.5 Gbps certified to the JESD204B spec
• Supports line rates up to 16.1 Gpbs not certified to the JESD204B spec
• Provides Physical and Data link layer functions
• AXI4-Stream interface for data
• AXI4-Lite for configuration interface