EF-DI-100G-RS-FEC-PROJ
Core License Agreement for IEEE 802.3bj Reed-Solomon Forward Error Correction
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Manufacturer:AMD
Product Category:
Programmable Logic, IP Cores
Avnet Manufacturer Part #: EF-DI-100G-RS-FEC-PROJ
Secondary Manufacturer Part#: EF-DI-100G-RS-FEC-PROJ
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RoHS 10 Compliant -
Tariff Charges
Xilinx® offers the 100 Gigabit IEEE 802.3bj Reed-Solomon Forward Error Correction (RS-FEC) IP core for data center and enterprise applications. This core is designed to the IEEE 802.3bj-2014 specification and connects seamlessly to the Xilinx integrated o
- Low latency
- Supports 100 Gigabits
- Configuration and status bus
- Selectable AXI4-Lite interface for status output
- Transcode Bypass mode for direct access to RS-FEC encoder/decoder
- Example reference design demo
Technical Attributes
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| Description | Value |
|---|
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 4911998000 |
| Schedule B: | 4911990000 |
Factory Lead Time: