DX-DI-64IP-XVE

The LogiCORE IP Initiator/Target v5 and v6 for PCI®-X core interface is a pre-implemented and fully tested module for Xilinx® FPGAs. Critical paths are controlled by constraints files to ensure predictable timing. This significantly reduces engineering

• Fully 2.0 Mode 1 compliant LogiCORE IP for PCI-X, 64-bit, 133/66 MHz interface with 3.3V operation
• 3.0-compliant core for PCI up to 33 MHz
• Customizable, programmable, single-chip solution
• Pre-defined implementation for pred