AS7C4098A-15JCNTR

The AS7C4098A is a high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as262,144 words × 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing aredesired.Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 5/6 ns are idealfor high-performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memorysystems.When CE is high the device enters standby mode. The device is guaranteed not to exceed 55mW power consumption in CMOSstandby mode. A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O1–I/O16 is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devicesshould drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).A read cycle is accomplished by asserting output enable (OE) and chip enable (CE), with write enable (WE) high. The chipdrives I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, orwrite enable is active, output drivers stay in high-impedance mode.The device provides multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to bewritten and read. LB controls the lower bits, I/O1–I/O8, and UB controls the higher bits, I/O9–I/O16.All chip inputs and outputs are TTL- and CMOS-compatible, and operation is for 5.0V (AS7C4098A) supply. The device isavailable in the JEDEC standard 400-mL, 44-pin SOJ, TSOP 2 packages.

• Pin compatible with AS7C4098
• Industrial and commercial temperature
• Organization: 262,144 words × 16 bits
• Center power and ground pins
• High speed
  • 10/12/15/20 ns address access time
  • 5/6 ns output enable access time
• Low power consumption: ACTIVE
  • 990mW/max @ 10 ns
• Low power consumption: STANDBY
  • 55mW/max CMOS
• Individual byte read/write controls
• Easy memory expansion with CE, OE inputs
• TTL
  • and CMOS-compatible, three-state I/O
• 44-pin JEDEC standard packages
  • 400-mil SOJ
  • TSOP 2
• ESD protection = 2000 volts
• Latch-up current = 200 mA