AS6C62256-55SCN
SRAM Chip Async Single 3.3V 256K-Bit 32K x 8 55ns 28-Pin SOP
- RoHS 10 Compliant
- Tariff Charges
AS6C62256-55SCN is a 262,144-bit low power CMOS static random access memory organized as 32,768 words by 8bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. It is well designed for low power application, and particularly well suited for battery back-up non-volatile memory application.
- Access time : 55ns
- Low power consumption, 15mA typ operation current, 1µA typ standby current (VCC = 3.0V)
- Wide range power supply : 2.7 to 5.5V
- Fully compatible with all competitors 5V and 3.3V product
- All inputs and outputs TTL compatible
- Fully static operation, tri-state output
- Data retention voltage is 1.5V (minimum)
- 32k x 8 organization
- 28pin 330mil SOP package
- Commercial operating temperature range from 0°C to 70°C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 15 Bit | ||
| 256 Kb | ||
| SOP | ||
| Surface Mount | ||
| 45 mA | ||
| 55 ns | ||
| 32K x 8bit | ||
| 256 Kb | ||
| Surface Mount | ||
| 28 | ||
| 8 Bit | ||
| 8 Bit | ||
| 1 | ||
| 32 kWords | ||
| 0 to 70 °C | ||
| 70 °C | ||
| 0 °C | ||
| 28SOP | ||
| 28 | ||
| 18.49 x 8.64 x 2.49 mm | ||
| No | ||
| Commercial | ||
| Asynchronous SRAM | ||
| SOP | ||
| 5.5 V | ||
| 2.7 V | ||
| 3.3 V | ||
| Asynchronous | ||
| 3.3000 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542320041 |
| Schedule B: | 8542320040 |