74LVC2G126DC,125 | Nexperia 缓冲器、收发器和线路驱动器 | Avnet Asia Pacific

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74LVC2G126DC,125

Buffer / Line Driver, Schmitt Trigger, 74LVC2G126, 2 Element, 1.65 V to 5.5 V, 8 Pins, VSSOP

74LVC2G126DC,125 | 缓冲器、收发器和线路驱动器 | Nexperia
Nexperia
制造商: Nexperia
安富利制造商模型#: 74LVC2G126DC,125
RoHS 6 Compliant

The 74LVC2G126 is a dual non-inverting buffer/line driver with 3-state outputs. Each 3-state output is controlled by an output enable input (pin nOE). A LOW-level at pin nOE causes the output to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC2G126 as a translator in a mixed 3.3 V and 5 V environment. It is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

技术参数

  • Wide supply voltage range from 1.65 V to 5.5 V
  • 5 V tolerant input/output for interfacing with 5 V logic
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5 V
  • Multiple package options
  • Specified from –40 ℃ to +85 ℃ and –40 ℃ to +125 ℃

技术特性

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描述
最高工作温度 125 °C
元素数量 2 Element
逻辑 IC 系列 74LVC
逻辑 IC 基数 741G126
传播时延 2.8 ns
输出电流 32 mA
逻辑器件类型 Buffer / Line Driver, Schmitt Trigger
逻辑系列/基数 74LVC2G126
芯片输出类型 Non-Inverting
通道数 2
最大工作电源电压 5.5 Vdc
最小电源电压 1.65 V
最低工作温度 -40 °C
最大电源电压 5.5 V
集成电路外壳/封装 VSSOP
引脚数 8
输入数量/位数 2bit
最小工作电源电压 1.65 Vdc

ECCN / UNSPSC

描述
ECCN: EAR99
计划交货期 B: 8542390000
HTSN: 8542390001
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