MT46H16M32LFB5-5 IT:C | Micron DRAM | Avnet Asia Pacific

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MT46H16M32LFB5-5 IT:C

DRAM, Mobile LPDDR, 512 Mbit, 16M x 32bit, 200 MHz, VFBGA, 90 Pins

MT46H16M32LFB5-5 IT:C | DRAM | Micron
Micron
制造商: Micron
产品分类: 内存, DRAM
安富利制造商模型#: MT46H16M32LFB5-5 IT:C
RoHS 10 Compliant

The 512Mb Mobile low-power DDR SDRAM is a high-speed CMOS, dynamic random access memory containing 536,870,912 bits. It is internally configured as a quad-bank DRAM. Each of the x16’s 134,217,728-bit banks is organized as 8192 rows by 1024 columns by 16 bits. Each of the x32’s 134,217,728-bit banks is organized as 8192 rows by 512 columns by 32 bits. In the reduced page-size (LG) option, each of the x32’s 134,217,728- bit banks are organized as 16,384 rows by 256 columns by 32 bits.

技术参数

  • VDD/VDDQ = 1.70–1.95V
  • Bidirectional data strobe per byte of data (DQS)
  • Internal, pipelined double data rate (DDR) architecture; two data accesses per clock cycle
  • Differential clock inputs (CK and CK#)
  • Commands entered on each positive CK edge
  • DQS edge-aligned with data for READs; center aligned with data for WRITEs
  • 4 internal banks for concurrent operation
  • Data masks (DM) for masking write data; one mask per byte
  • Programmable burst lengths (BL): 2, 4, 8, or 16
  • Concurrent auto precharge option is supported
  • Auto refresh and self refresh modes
  • 1.8V LVCMOS-compatible inputs
  • Temperature-compensated self refresh (TCSR)
  • Partial-array self refresh (PASR)
  • Deep power-down (DPD)
  • Status read register (SRR)
  • Selectable output drive strength (DS)
  • Clock stop capability
  • 64ms refresh, 32ms for automotive temperature

技术特性

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描述
时钟频率最大值 200 MHz
集成电路外壳/封装 VFBGA
集成电路安装 Surface Mount
存储密度 512 Mbit
最高工作温度 85 °C
引脚数 90
额定电源电压 1.8 V
最低工作温度 -40 °C
DRAM类型 Mobile LPDDR SDRAM

ECCN / UNSPSC

描述
ECCN: EAR99
计划交货期 B: PARTS...
HTSN: PARTS...
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