制造商:
ISSI
IS45S32200L-7TLA2-TR
DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II T/R
安富利制造商模型#:
IS45S32200L-7TLA2-TR
RoHS 6 Compliant
NCNR
Obsolete
ISSI's 64Mb Synchronous DRAM IS42/45S32200L isorganized as 524,288 bits x 32-bit x 4-bank for improvedperformance.ThesynchronousDRAMsachievehigh-speeddata transfer using pipeline architecture.
技术参数
- Clock frequency: 200, 166, 143, 133 MHz
- Fully synchronous; all signals referenced to a positive clock edge
- Internal bank for hiding row access/precharge
- Single 3.3V power supply
- LVTTL interface
- Programmable burst length: (1, 2, 4, 8, full page)
- Programmable burst sequence: Sequential/Interleave
- Self refresh modes
- 4096 refresh cycles every 16ms (A2 grade) or 64ms (Commercia, Industrial, A1 grade)
- Random column address every clock cycle
- Programmable CAS latency (2, 3 clocks)
- Burst read/write and burst read/single write operations capability
- Burst termination by burst stop and precharge command
技术特性
查找类似的料号|
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描述 | 值 |
|---|---|---|
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存储密度 | 64 Mbit |
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集成电路安装 | Surface Mount |
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引脚数 | 86 |
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最低工作温度 | -40 °C |
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额定电源电压 | 3.3 V |
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最高工作温度 | 105 °C |
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存储器配置 | 2M x 32 |
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集成电路外壳/封装 | TSOP-II |
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时钟频率最大值 | 143 MHz |
ECCN / UNSPSC
| 描述 | 值 |
|---|---|
| ECCN: | EAR99 |
| 计划交货期 B: | 8542320015 |
| HTSN: | 8542320002 |