制造商:
AMD
XC7K410T-2FFG900C
FPGA, Kintex-7, MMCM, PLL, 350 I/O's, 710 MHz, 406720 Cells, 970 mV to 1.03 V, FCBGA-900, NCNR
安富利制造商模型#:
XC7K410T-2FFG900C
RoHS 10 Compliant
Xilinx® 7 series FPGAs comprise three new FPGA families that address the complete range of system requirements, ranging from low cost, small form factor, cost-sensitive, high-volume applications to ultra high-end connectivity bandwidth, logic capacity, and signal processing capability for the most demanding high-performance applications. The 7 series FPGAs include:
Built on a state-of-the-art, high-performance, low-power (HPL), 28 nm, high-k metal gate (HKMG) process technology, 7 series FPGAs enable an unparalleled increase in system performance with 2.9 Tb/s of I/O bandwidth, 2 million logic cell capacity, and 5.3 TMAC/s DSP, while consuming 50% less power than previous generation devices to offer a fully programmable alternative to ASSPs and ASICs.
技术参数
- Advanced high-performance FPGA logic based on real 6-input lookup table (LUT) technology configurable as distributed memory.
- 36 Kb dual-port block RAM with built-in FIFO logic for on-chip data buffering.
- High-performance SelectIO™ technology with support for DDR3 interfaces up to 1,866 Mb/s.
- High-speed serial connectivity with built-in multi-gigabit transceivers from 600 Mb/s to maximum rates of 6.6 Gb/s up to 28.05 Gb/s, offering a special low-power mode, optimized for chip-to-chip interfaces.
- A user configurable analog interface (XADC), incorporating dual 12-bit 1MSPS analog-to-digital converters with on-chip thermal and supply sensors.
- DSP slices with 25 x 18 multiplier, 48-bit accumulator, and pre-adder for high-performance filtering, including optimized symmetric coefficient filtering.
- Powerful clock management tiles (CMT), combining phase-locked loop (PLL) and mixed-mode clock manager (MMCM) blocks for high precision and low jitter.
- Integrated block for PCI Express® (PCIe), for up to x8 Gen3 Endpoint and Root Port designs.
- Wide variety of configuration options, including support for commodity memories, 256-bit AES encryption with HMAC/SHA-256 authentication, and built-in SEU detection and correction.
- Low-cost, wire-bond, lidless flip-chip, and high signal integrity flipchip packaging offering easy migration between family members in the same package. All packages available in Pb-free and selected packages in Pb option.
- Designed for high performance and lowest power with 28 nm, HKMG, HPL process, 1.0V core voltage process technology and 0.9V core voltage option for even lower power.
技术特性
查找类似的料号|
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描述 | 值 |
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最高工作温度 | 85 |
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用户输入/输出数量 | 350 |
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集成电路外壳/封装 | FCBGA |
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速度等级 | 2 |
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集成电路安装 | Surface Mount |
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逻辑单元数量 | 406 |
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引脚数 | 900 |
ECCN / UNSPSC
| 描述 | 值 |
|---|---|
| ECCN: | 3A991.d |
| 计划交货期 B: | PARTS... |
| HTSN: | PARTS... |
文档
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文档
| 标题 | 下载 | 类别 | 发布日期 |
|---|---|---|---|
| 7 Series FPGAs Family Overview | Product-Guides | 20130331 | |
| Kintex-7 FPGA Product Brief | Product-Guides | 20130331 | |
| 7 Series FPGAs Clocking Resources Guide | User-Guides | 20130331 | |
| 7 Series FPGAs Memory Resources Guide | User-Guides | 20130331 | |
| Selector-Guides |