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Si-Fly® HD 224 Gbps PAM4, Co-Packaged & Near-Chip Systems

 

Abracon Multi-Phase Assembly Inductors

In the realm of co-packaged and high-density interconnects, Samtec has introduced the CPX architecture. This architecture supports both Co-Packaged Copper (CPC) and Co-Packaged Optics (CPO) on the same physical platform through a unified substrate socket design. In terms of space efficiency, a single CPX connector, measuring approximately 15×18 mm, can integrate 64 differential pairs. For example, deploying 16 such connectors on a 95×95 mm substrate enables an aggregate bandwidth of 100 Tbps. This design reduces channel loss while retaining electrical pluggability, allowing system architectures to flexibly switch between short-distance Scale-up within a rack and long-distance Scale-out across racks.

On the industry ecosystem front, as a founding member of the Open CPX MSA, Samtec is collaborating with Ciena, Coherent, Marvell, Molex, TeraHop, and other companies to jointly define key specifications for optical engines, including mechanical structure, thermal performance, and electrical interfaces. By participating in the definition of industry standards, the aim is to promote interoperability of co-packaged technologies and reduce the complexity of system integration. Currently, application cases based on the CPX architecture — including 100 Tbps network switching topologies and xPU interconnect topologies — have been validated in practical testing, providing concrete engineering references for high-speed interconnect upgrades in data centers.

Si-Fly® HD co-packaged and near-chip systems provide the highest density 224 Gbps PAM4 solution in today's market. Electrically pluggable co-packaged copper and optics solutions (known as CPX) are achievable on a 95 mm x 95 mm or smaller substrate using Samtec's SFCM connector. The SFCM mounts directly to the package substrate and is pluggable with Samtec's SFCC cable assembly or an optical cable assembly of your choosing.
 

Features

  • High-density 224 Gbps PAM4 co-packaged and near-chip (ASIC adjacent) cable systems
  • CPX: electrically pluggable co-packaged copper & co-packaged optic high-density, high-performance interconnects on a 95 mm x 95 mm or smaller substrate (SFCC, SFCF, SFCM-01, SFCM-02, SFOF, SFOM, Optics)
  • Co-packaged CPX offers the lowest loss signal transmission from the package to the front panel or backplane while providing the highest density (use copper for short distances/scale up, optics for extended reach/scale out)
  • PCIe® 7.0 capable
  • Eye Speed® Hyper Low Skew Twinax cable technology supports 224G signaling with an industry leading 1.75 ps/m max intra-pair skew
  • Placement of Flyover® cable solutions on, or near, the chip package improves transmission line density and extends signal reach in high-performance applications
  • High-density mezzanine arrays feature 64 differential pairs per square inch
  • Routes an extremely high number of transmission lines from one PCB to the next
  • Surface mount reflow technology to the PCB

Si-Fly® HD 224 Gbps PAM4, Co-Packaged & Near-Chip Systems


Applications

  • Datacom
  • AI
  • Servers
  • Quantum Computing
  • Semiconductor Manufacturing
  • Automotive & Transportation
  • Computer
  • Mecical
  • Industrial/IIoT

Si-Fly® HD 224 Gbps PAM4, Co-Packaged & Near-Chip Systems

 

 

Si-Fly® HD 224 Gbps PAM4, Co-Packaged & Near-Chip Systems

 

 

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