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The Virtex®-5 family provides the newest most powerful features in the FPGA market. Using the second generation ASMBL (Advanced Silicon Modular Block) column-based architecture, the Virtex-5 family contains five distinct platforms (sub-families), the most choice offered by any FPGA family. Each platform contains a different ratio of features to address the needs of a wide variety of advanced logic designs. In addition to the most advanced, high-performance logic fabric, Virtex-5 FPGAs contain many hard-IP system level blocks, including powerful 36-Kbit block RAM/FIFOs, second generation 25 x 18 DSP slices, SelectIO technology with built-in digitallycontrolled impedance, ChipSync source-synchronous interface blocks, system monitor functionality, enhanced clock management tiles with integrated DCM (Digital Clock Managers) and phase-locked-loop (PLL) clock generators, and advanced configuration options. Additional platform dependant features include power-optimized high-speed serial transceiver blocks for enhanced serial connectivity, PCI Express® compliant integrated Endpoint blocks, tri-mode Ethernet MACs (Media Access Controllers), and high-performance PowerPC® 440 microprocessor embedded blocks. These features allow advanced logic designers to build the highest levels of performance and functionality into their FPGA-based systems. Built on a 65-nm state-of-the-art copper process technology, Virtex-5 FPGAs are a programmable alternative to custom ASIC technology. Most advanced system designs require the programmable strength of FPGAs. Virtex-5 FPGAs offer the best solution for addressing the needs of high-performance logic designers, high-performance DSP designers, and high-performance embedded systems designers with unprecedented logic, DSP, hard/soft microprocessor, and connectivity capabilities. The Virtex-5 LX platform include advanced high-speed serial connectivity and link/transaction layer capability.
技術參數
|
描述 | 值 |
---|---|---|
|
速度等級 | 1 |
|
最低工作溫度 | -40 |
|
集成電路貼裝 | Surface Mount |
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用戶輸入/輸出數量 | 440 |
|
邏輯單元數量 | 110 |
|
引腳數 | 676 |
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最高工作溫度 | 100 |
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集成電路外殼/封裝 | FCBGA |
描述 | 值 |
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ECCN: | 3A991.d |
計劃交貨期 B: | PARTS... |
HTSN: | PARTS... |
文件
標題 | 下載 | 類別 | 發布日期 |
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Virtex-5 FPGA Packaging and Pinout Specification | Technical-Specifications | 20130331 | |
Functional Description of the Virtex-5 FPGA Architecture | User-Guides | 20130331 | |
Virtex-5 Family Overview | Product-Guides | 20130331 |