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Combining Advanced Silicon Modular Block (ASMBL) architecture with a wide variety of flexible features, the Virtex®-4 family from Xilinx greatly enhances programmable logic design capabilities, making it a powerful alternative to ASIC technology. Virtex-4 FPGAs comprise three platform families—LX, FX, and SX—offering multiple feature choices and combinations to address all complex applications. The wide array of Virtex-4 FPGA hard-IP core blocks includes the PowerPC® processors (with a new APU interface), tri-mode Ethernet MACs, 622 Mb/s to 6.5 Gb/s serial transceivers, dedicated DSP slices, high-speed clock management circuitry, and source-synchronous interface blocks. The basic Virtex-4 FPGA building blocks are enhancements of those found in the popular Virtex, Virtex-E, Virtex-II, Virtex-II Pro, and Virtex-II Pro X product families, so previous-generation designs are upward compatible. Virtex-4 devices are produced on a state-of-the-art 90 nm copper process using 300 mm (12-inch) wafer technology.
技術參數
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描述 | 值 |
---|---|---|
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速度等級 | 10 |
|
引腳數 | 1152 |
|
邏輯單元數量 | 56 |
|
集成電路貼裝 | Surface Mount |
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集成電路外殼/封裝 | FCBGA |
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最高工作溫度 | 85 |
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用戶輸入/輸出數量 | 576 |
描述 | 值 |
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ECCN: | 3A991.d |
計劃交貨期 B: | PARTS... |
HTSN: | PARTS... |
文件
標題 | 下載 | 類別 | 發布日期 |
---|---|---|---|
Functional Description of the Virtex-4 FPGA Architecture | User-Guides | 20130331 | |
Virtex-4 Family Overview | Product-Guides | 20130331 |