製造商:
Nexperia
74LVT162373DGG 118
Latch, 74LVT162373, D Type Transparent, Tri State Non Inverted, 4.6 ns, 12 mA, 48 Pins, TSSOP
替代料號:
74LVT162373DGG,118
RoHS 6 Compliant
The 74LVT162373 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is a 16-bit transparent D-type latch with non-inverting 3-State bus compatible outputs. The device can be used as two 8-bit latches or one 16-bit latch. When Latch Enable (LE) input is High, the Q outputs follow the data (D) inputs. When Latch Enable is taken Low, the Q outputs are latched at the levels of the D inputs one setup time prior to the High-to-Low transition. The 74LVT162373 is designed with 30 Ω series resistance in both the High and Low states of the output. This design reduces the noise in applications such as memory address drivers, clock drivers, and bus receivers/transmitters.
技術參數
- 16-bit transparent latch
- 3-State buffers
- Output capability: +12 mA / -12 mA
- TTL input and output switching levels
- Input and output interface capability to systems at 5 V supply
- Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
- Live insertion/extraction permitted
- Outputs include series resistance of 30 Ω making external resistors unnecessary
- Power-up reset
- Power-up 3-State
- No bus current loading when output is tied to 5 V bus
- Latch-up protection exceeds 500 mA per JEDEC Std 17
- ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model
技術屬性
查找類似的料號|
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描述 | 值 |
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引腳數 | 48 |
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芯片輸出類型 | Tri State Non Inverted |
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最大電源電壓 | 3.6 V |
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最低工作溫度 | -40 °C |
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最高工作溫度 | 85 °C |
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通道數 | 16 |
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最小電源電壓 | 2.7 V |
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元素數量 | Two |
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傳播時延 | 4.6 ns |
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輸出電流 | 12 mA |
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邏輯系列/基數 | 74LVT162373 |
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邏輯 IC 系列 | 74LVT |
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位數 | 16bit |
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邏輯 IC 基數 | 74162373 |
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鎖存器類型 | D Type Transparent |
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集成電路外殼/封裝 | TSSOP |
ECCN/UNSPSC
| 描述 | 值 |
|---|---|
| ECCN: | EAR99 |
| 計劃交貨期 B: | 8542390000 |
| HTSN: | 8542390001 |