Precision Timing

MEMS oscillators reject supply noise; FemtoClock generates and conditions clocks for optics, NICs and AEC endpoints

AI data centers push optical modules, NICs and active electrical cables (AECs) to higher SerDes rates. Supply noise adds clock jitter and raises BER. SiTime MEMS oscillators reject supply noise, while FemtoClock generates and conditions clocks.

Data center optics, NICs and active electrical cables support increasing SerDes rates. Power-supply noise at oscillator supply pins adds clock jitter. Power supply-induced jitter sensitivity (PSIJS) quantifies this response. Higher jitter increases bit error rates and retransmissions. SiTime MEMS differential oscillators integrate on-chip LDOs in a seventh-generation CMOS process to reject supply noise at the source. FemtoClock devices generate and condition clocks for SerDes and Ethernet links at AEC endpoints.

Features

• SiTime MEMS differential oscillators provide low-jitter reference clocks with supply-noise rejection.
• Standard-frequency and programmable-frequency options support optical, PCIe and networking clock requirements.
• SiTime’s seventh-generation CMOS architecture integrates multiple on-chip LDOs that reject supply noise at the source across frequencies and amplitudes, reducing reliance on downstream filtering.
• FemtoClock 3 devices provide clock generation, jitter attenuation and multiple clock outputs for high-speed interfaces. 

Applications

Pluggable optical transceivers, network interface cards (NICs), active electrical cable assemblies, PCIe Gen 6 and Gen 7 host and device interfaces, AI/GPU cards and compute racks, high-radix Ethernet switches, FPGA-based networking platforms and hyperscale data center interconnects.

Key components

• SiT9505 and SiT9507 MEMS differential oscillators provide five and 16 standard frequencies, respectively. Each supports 100, 156.25, 312.5 and 625 MHz, while SiT9505 also supports 50 MHz. They deliver 41 and 29 fs RMS phase jitter (typ.), respectively, with 9 fs/mV PSIJS for optical modules, data center switches and AI/GPU cards.
• SiT9371 MEMS differential oscillator provides a 100 MHz reference with 7 fs RMS phase jitter (typ.) for PCIe Gen 7, 10 fs for PCIe Gen 6 and 9 fs/mV PSIJS for networking, storage and server systems.
• SiT9375, SiT9376 and SiT9377 MEMS differential oscillators cover 25 to 644.53125 MHz across 34 standard frequencies, 1 to 220 MHz at any frequency and 220 to 920 MHz at any frequency, respectively. Each delivers 150 fs RMS phase jitter (typ.) and 9 fs/mV PSIJS for optical modules, data center switches and FPGA clocking.
• FemtoClock 3 RC22308A and RC22312A clock generators and RC32308A and RC32312A jitter attenuators provide 8- and 12-output options and ultra-low-jitter clocks for SerDes, Ethernet and high-speed converter interfaces at NIC, switch and AEC endpoints.

Benefits

• Maintains signal integrity in dense AI compute racks by limiting supply-noise-induced clock jitter.
• Delivers more jitter margin for PCIe Gen 6 and Gen 7 interfaces and other high-speed networking links as data rates increase.
• Reduces jitter-related BER and the risk of retransmissions and link flaps, protecting bandwidth and system utilization.
• Simplifies clock architecture and system jitter budgeting by consolidating multiple clock outputs at NIC and switch endpoints.