NCV51200MWTXG
3A Sink/Source DDR Termination Regulator w/ VTTREF Buffered Reference for DDR2, DDR3, DDR3L and DDR4. ONSSPCLDO;
The NCP51200 is a source/sink Double Data Rate (DDR) termination regulator specifically designed for low input voltage and low-noise systems where space is a key consideration. The NCP51200 maintains a fast transient response and only requires a minimum output capacitance of 20 uF. The NCP51200 supports a remote sensing function and all power requirements for DDR VTT bus termination. The NCP51200 can also be used in low-power chipsets and graphics processor cores that require dynamically adjustable output voltages. The NCP51200 is available in the thermally-efficient DFN10 Exposed Pad package, and is rated both Green and Pb-free.
- Input Voltage Rails: Supports 2.5 and 3.3 V Rails
- PVCC Voltage Range: 1.1 to 3.5 V
- Integrated Power MOSFETs
- Fast Load-Transient Response
- PGOOD-Logic output pin to Monitor VTT Regulation
- EN-Logic input pin for Shutdown mode
- VRI-Reference Input Allows for Flexible Input Tracking Either Directly or Through Resistor Divider
- Remote Sensing (VTTS)
- Built-in Soft Start, Under Voltage Lockout and Over Current Limit
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Surface Mount | ||
| 10 | ||
| -40 to 125 °C | ||
| 125 °C | ||
| -40 °C | ||
| 10 | ||
| 3 A | ||
| DFN | ||
| 5.5 V | ||
| 2.375 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | null |
| ECCN: | EAR99 |
| HTSN: | 8542390001 |
| Schedule B: | 8542390000 |