MC74HC74ADG
Dual D Flip-Flop with Set and Reset. ONSSPCLGC;
The MC74HC74ADG is a dual D-type Flip-flop with set and reset. It is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs, with pull-up resistors, they are compatible with LSTTL outputs. This device consists of two D flip-flops with individual Set, Reset and Clock inputs. Information at a D-input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Q outputs are available from each flip-flop. The set and reset inputs are asynchronous.
- 10 LSTTL Loads output drive capability
- Outputs directly interface to CMOS, NMOS and TTL
- High noise immunity characteristic of CMOS devices
- Complies with JEDEC standard No. 7A
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Single-Ended | ||
| Matte Tin | ||
| HC | ||
| D-Type | ||
| 260 | ||
| -5.2 mA | ||
| 100@2V|75@3V|20@4.5V|17@6V ns | ||
| 0.002 mA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 2 | ||
| 1 | ||
| 1 | ||
| 2 | ||
| 0 | ||
| -55 to 125 °C | ||
| Differential | ||
| 14SOIC | ||
| 14 | ||
| Inverting|Non-Inverting | ||
| 8.75 x 4 x 1.5 mm | ||
| 50 pF | ||
| No | ||
| Set, Reset | ||
| SOIC | ||
| Positive-Edge | ||
| 2.5|3.3|5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | null |
| ECCN: | EAR99 |
| HTSN: | PARTS... |
| Schedule B: | PARTS... |