MC74HC126ADTR2G
Quad Non-inverting Buffer, 3-State. ONSSPCLGC;
- RoHS 10 Compliant
- Tariff Charges
The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A noninverting buffers are designed to be used with 3-state memory address drivers, clock drivers, and other bus-oriented systems. The devices have four separate output enables that are active-low (HC125A) or active-high (HC126A).
- Output Drive Capability: 15 LSTTL Loads
- Outputs Directly Interface to CMOS, NMOS, and TTL
- Operating Voltage Range: 2.0 to 6.0 V
- Low Input Current: 1.0 µA
- High Noise Immunity Characteristic of CMOS Devices
- In Compliance with the Requirements Defined by JEDEC Standard No. 7A
- Chip Complexity: 72 FETs or 18 Equivalent Gates
- Pb-Free Devices are available
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Single-Ended | ||
| Gold | ||
| HC | ||
| Buffer/Line Driver | ||
| 260 | ||
| -7.8 mA | ||
| 7.8 mA | ||
| 6 V | ||
| 90@2V|36@3V|18@4.5V|15@6V ns | ||
| 4 uA | ||
| 2 V | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 4 | ||
| 4 | ||
| 0 | ||
| 4 | ||
| 4 High | ||
| 4 | ||
| -55 to 125 °C | ||
| 3-State | ||
| 14 | ||
| Non-Inverting | ||
| 5.1 x 4.5 x 1.05 mm | ||
| 50 pF | ||
| No | ||
| TSSOP | ||
| 2.5|3.3|5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | null |
| ECCN: | EAR99 |
| HTSN: | 8542390001 |
| Schedule B: | 8542390000 |