74AUP2G34GW,125
Buffer, Dual, 1 Input, 6 Pins, TSSOP, 74AUP2G34
The 74AUP2G34 provides two low-power, low-voltage buffers. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
- Wide supply voltage range from 0.8 V to 3.6 V
- High noise immunity
- Complies with JEDEC standards:
- JESD8-12 (0.8 V to 1.3 V)
- JESD8-11 (0.9 V to 1.65 V)
- JESD8-7 (1.2 V to 1.95 V)
- JESD8-5 (1.8 V to 2.7 V)
- JESD8-B (2.7 V to 3.6 V)
- ESD protection:
- HBM JESD22-A114F Class 3A exceeds 5000 V
- MM JESD22-A115-A exceeds 200 V
- CDM JESD22-C101E exceeds 1000 V
- Low static power consumption; ICC = 0.9 µA (maximum)
- Latch-up performance exceeds 100 mA per JESD 78 Class II
- Inputs accept voltages up to 3.6 V
- Low noise overshoot and undershoot < 10 % of VCC
- IOFF circuitry provides partial Power-down mode operation
- Multiple package options
- Specified from -40 °C to +85 °C and -40 °C to +125 °C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Single-Ended | ||
| Tin | ||
| AUP | ||
| Buffer | ||
| 260 | ||
| -4 mA | ||
| 4 mA | ||
| 16.3@1.1V to 1.3V|10.3@1.4V to 1.6V|8.1@1.65V to 1.95V|6.4@2.3V to 2.7V|5.6@3V to 3.6V ns | ||
| 0.5 uA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 2 | ||
| 2 | ||
| 0 | ||
| 2 | ||
| 0 | ||
| 2 | ||
| -40 to 125 °C | ||
| 6 | ||
| Non-Inverting | ||
| 2.2 x 1.35 x 1 mm | ||
| 30 pF | ||
| No | ||
| TSSOP | ||
| 1.8|2.5|3.3 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | null |
| ECCN: | EAR99 |
| HTSN: | 8542390001 |
| Schedule B: | 8542390000 |
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