MT29F2G08ABAEAWP-IT:E

MT29F2G08ABAEAWP-IT:E is a NAND flash memory. It includes an asynchronous data interface for high-performance I/O operations. This device uses a highly multiplexed 8-bit bus (I/Ox) to transfer commands, address, and data. There are five control signals used to implement the asynchronous data interface: CE#, CLE, ALE, WE#, and RE#. Additional signals control hardware write protection and monitor device status (R/B#). This hardware interface creates a low pin-count device with a standard pinout that remains the same from one density to another, enabling future upgrades to higher densities with no board redesign. A target is the unit of memory accessed by a chip enable signal. A target contains one or more NAND Flash die. A NAND Flash die is the minimum unit that can independently execute commands and report status. A NAND Flash die, in the ONFI specification, is referred to as a logical unit (LUN). There is at least one NAND Flash die per chip enable signal.

• Open NAND flash interface (ONFI) 1.0-compliant, single-level cell (SLC) technology
• Ready/Busy# (R/B#) signal provides a hardware method of detecting operation completion
• WP# signal: write protect entire device
• Block 0 requires 1-bit ECC if PROGRAM/ERASE cycles are less than 1000
• RESET (FFh) required as first command after power-on
• Internal data move operations supported within the plane from which data is read
• Data retention: 10 years, endurance: 100,000 PROGRAM/ERASE cycles
• 2Gb density
• 3.3V (2.7–3.6V) operating voltage range
• 48-pin TSOP package, -40°C to +85°C industrial operating temperature range