74LVC1G11GV,125
Logic IC, AND Gate, Single, 3 Inputs, 6 Pins, SC-74, 74LVC1G11
The 74LVC1G11 provides a single 3-input AND gate. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
- Wide supply voltage range from 1.65 V to 5.5 V
- 5 V tolerant inputs for interfacing with 5 V logic
- High noise immunity
- Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8-B/JESD36 (2.7 V to 3.6 V)
- ±24 mA output drive (VCC = 3.0 V)
- ESD protection:
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
- CMOS low power consumption
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- Multiple package options
- Specified from -40 °C to +85 °C and -40 °C to +125 °C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Schmitt Trigger | ||
| Tin | ||
| AND | ||
| 260 | ||
| -32 mA | ||
| 32 mA | ||
| 3@2.7V|2.6@3.3V|1.9@5V ns | ||
| 200 uA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 1 | ||
| 0 | ||
| 0 | ||
| -40 to 125 °C | ||
| 6TSOP | ||
| 6 | ||
| 3.1 x 1.7 x 1 mm | ||
| No | ||
| TSOP | ||
| 0.1 uA |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | null |
| ECCN: | EAR99 |
| HTSN: | 8542390001 |
| Schedule B: | 8542390000 |
Factory Lead Time: