Manufacturer:
ISSI
IS43DR16128A-3DBLI
DRAM Chip DDR2 SDRAM 2G-Bit 128Mx16 1.8V 84-Pin TWBGA
Avnet Manufacturer Part #:
IS43DR16128A-3DBLI
RoHS 6 Compliant
DRAM Chip DDR2 SDRAM 2G-Bit 128Mx16 1.8V 84-Pin TWBGA
Key Features
- Clock frequency up to 333MHz
- 8 internal banks for concurrent operation
- 4-bit prefetch architecture
- Programmable CAS Latency: 3, 4, 5, 6 and 7
- Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6
- Write Latency = Read Latency-1
- Programmable Burst Sequence: Sequential or Interleave
- Programmable Burst Length: 4 and 8
- Automatic and Controlled Precharge Command
- Power Down Mode
- Auto Refresh and Self Refresh
- Refresh Interval: 7.8 us (8192 cycles/64 ms)
- ODT (On-Die Termination)
- Weak Strength Data-Output Driver Option
- Bidirectional differential Data Strobe (Single-ended data-strobe is an optional feature)
- On-Chip DLL aligns DQ and DQs transitions with CK transitions
- DQS# can be disabled for single-ended data strobe
- Differential clock inputs CK and CK#
- Vdd and Vddq = 1.8V ± 0.1V
- PASR (Partial Array Self Refresh)
- SSTL_18 interface
- tRAS lockout supported
- Operating temperature: Commercial (TA = 0°C to 70°C ; TC = 0°C to 85°C) Industrial (TA = -40°C to 85°C; TC = -40°C to 95°C) Configuration:
- 128Mx16 (two-stacked 16M x 8 x 8 banks) Package:
- 84-ball LF-BGA
Technical Attributes
Find Similar Parts|
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Description | Value |
|---|---|---|
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DRAM Type | DDR2 SDRAM |
|
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Clock Frequency Max | 333 MHz |
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Supply Voltage Nom | 1.8 V |
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Memory Configuration | 128M x 16 |
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No. of Pins | 84 |
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Memory Density | 2 Gbit |
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Operating Temperature Min | -40 °C |
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IC Mounting | Surface Mount |
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Operating Temperature Max | 85 °C |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| ECCN: | EAR99 |
| SCHEDULE B: | PARTS... |
| HTSN: | PARTS... |