Manufacturer:
Nexperia
Product Category:
Analog Switches & Multiplexers,
Analog Switches, Multiplexers & Demultiplexers
74LVC1G66GM,115
Analog Switch Single SPST 6-Pin XSON T/R
Avnet Manufacturer Part #:
74LVC1G66GM,115
RoHS 10 Compliant
The 74LVC1G66 provides one single pole, single-throw analog switch function. It has two input/output terminals (Y and Z) and an active HIGH enable input pin (E). When E is LOW, the analog switch is turned off. Schmitt-trigger action at the enable input makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 1.65 V to 5.5 V.
Key Features
- Wide supply voltage range from 1.65 V to 5.5 V
- Very low ON resistance:
- 7.5 Ω (typical) at VCC = 2.7 V
- 6.5 Ω (typical) at VCC = 3.3 V
- 6 Ω (typical) at VCC = 5 V
- Switch current capability of 32 mA
- High noise immunity
- CMOS low power consumption
- TTL interface compatibility at 3.3 V
- Latch-up performance meets requirements of JESD78 Class I
- ESD protection:
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
- Enable input accepts voltages up to 5.5 V
- Multiple package options
- Specified from ‑40 °C to +85 °C and ‑40 °C to +125 °C
Technical Attributes
Find Similar Parts|
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Description | Value |
|---|---|---|
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Power Supply Type | Single Supply |
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Operating Temperature Max | 125 |
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Maximum Power Dissipation | 250 mW |
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No. of Pins | 6 |
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Operating Temperature Min | -40 |
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IC Mounting | Surface Mount |
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IC Case / Package | XSON |
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Maximum On Resistance Range | 150 to 250 Ohm |
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Number of Channels per Chip | 1 |
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No. of Channels | 1 |
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Switch Configuration | SPST - NO |
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IC Function | Bilateral Switch |
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Output Signal Type | Single-Ended |
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Maximum Propagation Delay Bus to Bus | 0.8@1.95|0.4@2.7|0.3@3.6|0.2@5.5 ns |
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Polarity | Non-Inverting |
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On Resistance Max | 130 |
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Supply Voltage Range | 1.65V to 5.5V |
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Product Range | LVC Series |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| ECCN: | EAR99 |
| SCHEDULE B: | 8542390000 |
| HTSN: | 8542390001 |
Documents
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Documents
| Title | Download | Type | Date Published |
|---|---|---|---|
| Improved BOM of leadless 5/6 pad packages, including die optimization to achieve zero delamination in ATSN (Nexperia Assembly & Test Plant Seremban Malaysia) | PCN-Documentation | 20191231 |