74HCT4514PW,118

The 74HC/HCT4514 are high-speed Si-gate CMOS devices and are pin compatible with “4514” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4514 are 4-to-16 line decoders/demultiplexers having four binary weighted address inputs (A0 to A3), with latches, a latch enable input (LE), and an active LOW enable input. The 16 outputs (Q0 to Q15) are mutually exclusive active HIGH. When LE is HIGH, the selected output is determined by the data on An. When LE goes LOW, the last data present at An are stored in the latches and the outputs remain stable. When enable input is LOW, the selected output, determined by the contents of the latch, is HIGH. At E HIGH, all outputs are LOW. The enable input does not affect the state of the latch. When the “4514” is used as a demultiplexer, enable input is the data input and A0 to A3 are the address inputs.