74HC4052PW,118

The 74HC4052; 74HCT4052 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4052B. The device is specified in compliance with JEDEC standard no. 7A. The 74HC4052; 74HCT4052 is a dual 4-channel analog multiplexer/demultiplexer with common select logic. Each multiplexer has four independent inputs/outputs (pins nY0 to nY3) and a common input/output (pin nZ). The common channel select logics include two digital select inputs (pins S0 and S1) and an active LOW enable input. When pin enable input = LOW, one of the four switches is selected (low-impedance ON-state) with pins S0 and S1. When pin enable input = HIGH, all switches are in the high-impedance OFF-state, independent of pins S0 and S1.