Manufacturer:
Nexperia
Product Category:
Logic ICs,
Gates & Inverters
74AUP2G04GW125
Inverter Schmitt Trigger, Dual, 1 Input, 6 Pins, TSSOP, 74AUP2G04
Avnet Manufacturer Part #:
74AUP2G04GW,125
RoHS 10 Compliant
The 74AUP2G04 provides two inverting buffers. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
Key Features
Wide supply voltage range from 0.8 V to 3.6 V High noise immunity Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F Class 3A exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Low static power consumption; ICC = 0.9 A (maximum) Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of VCC IOFF circuitry provides partial power-down mode operation Multiple package options Specified from 40 C to +85 C and 40 C to +125 C
Technical Attributes
Find Similar Parts|
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Description | Value |
|---|---|---|
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IC Case / Package | TSSOP |
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Supply Voltage Max | 3.6 V |
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Operating Temperature Max | 125 °C |
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Propagation Delay | 16 ns |
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No. of Inputs | 1 |
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Supply Voltage Min | 0.8 V |
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Product Range | 74AUP2G04 Series |
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Logic IC Family | 74AUP |
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No. of Elements | Dual |
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Logic Function | Inverter Schmitt Trigger |
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Output Current | 4 mA |
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Operating Temperature Min | -40 °C |
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No. of Pins | 6 |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| ECCN: | EAR99 |
| SCHEDULE B: | 8542390000 |
| HTSN: | 8542390001 |
Documents
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Documents
| Title | Download | Type | Date Published |
|---|---|---|---|
| NXP-201605004F01 PCN | Other-Documents | 20160109 |