MC74ACT74DR2G

MC74ACT74DR2G is a dual D-Type positive edge-triggered flip-flop with asynchronous clear and set inputs and complementary (Q, active-low Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the clock pulse input threshold voltage has been passed, the data input is locked out and the information present will not be transferred to the outputs until the next rising edge of the clock pulse input.

• Outputs source/sink current is 24mA, ACT74 has TTL compatible inputs
• Supply voltage range from 4.5 to 5.5V
• Maximum clock frequency is 210MHz (TA = +25°C, CL = 50pF)
• Set-up time, HIGH or LOW Dn to CPn is 1.0ns typ (TA = +25°C, CL = 50pF)
• Hold time, HIGH or LOW Dn to CPn is -0.5ns typ (TA = +25°C, CL = 50pF)
• CPn or active low CDn or active low SDn pulse width is 3.0ns typ (TA = +25°C, CL = 50pF)
• Recovery time active low CDn or active low SDn to CP is -2.5ns typ (TA = +25°C, CL = 50pF)
• Input capacitance is 4.5pF typical (VCC = 5V), power dissipation capacitance is 35pF (VCC = 5V)
• SOIC-14 package, operating ambient temperature range from -40 to 85°C