74LV4051D,118

74LV4051D,118 is an 8-channel analogue multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-low enable input (active-low E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). It is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC4051 and 74HCT4051. With active-low E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With active-low E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2. VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E). The VCC to GND ranges are 1.0V to 6.0V. The analogue inputs/outputs (Y0 to Y7, and Z) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 6.0V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).

• Optimized for low-voltage applications: 1.0V to 6.0V
• Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
• Logic level translation: to enable 3V logic to communicate with ±3V analogue signals
• Typical ‘break before make’ built in
• Input clamping current is ±20mA max at VI < -0.5V or VI > VCC + 0.5V
• Switch current is ±25mA at VSW > -0.5V or VSW < VCC + 0.5V;source or sink current
• Total power dissipation is 500mW max at Tamb = -40°C to +125°C
• Input transition rise and fall rate is 500ns/V max at VCC = 1.0V to 2.0V
• SO16 package
• Temperature range from -40 to +125°C