74HC138BQ,115
3-to-8 Line Decoder / Demultiplexer, 74HC, 8 Outputs, 2 V to 6 V, 16 Pins, DHVQFN
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RoHS 10 Compliant -
Tariff Charges
The 74HC138-Q100; 74HCT138-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs. The device features three enable inputs. Every output will be HIGH unless enable inputs are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four ‘138’ ICs and one inverter. The ‘138’ can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
- Demultiplexing capability
- Multiple input enable for easy expansion
- Ideal for memory chip select decoding
- Active low mutually exclusive outputs
- CMOS Input levels
- Complies with JEDEC standard No. 7A
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 1-of-8 | ||
| Gold | ||
| HC | ||
| Decoder/Demultiplexer | ||
| 260 | ||
| -5.2 mA | ||
| 5.2 mA | ||
| 6 V | ||
| 150@2V|30@4.5V|26@6V ns | ||
| 0.008 mA | ||
| 2 V | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 3 | ||
| 8 | ||
| 1 | ||
| 3 | ||
| 0 | ||
| -40 to 125 °C | ||
| 16DHVQFN EP | ||
| 16 | ||
| Inverting | ||
| 3.6 x 2.6 x 0.95 mm | ||
| 50 pF | ||
| No | ||
| DHVQFN EP | ||
| 5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | null |
| ECCN: | EAR99 |
| HTSN: | 8542390001 |
| Schedule B: | 8542390000 |
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