74AHC273PW,118
Balanced propagation delays ¦ All inputs have Schmitt-trigger actions ¦ Inputs accept voltages higher than VCC ¦ Ideal buffer for MOS microcontroller or memory ¦ Common clock and master reset ¦ Related product versions: ? 74AHC377; 74AHCT377 for clock enable version ? 74AHC373; 74AHCT373 for transparent latch version ? 74AHC374; 74AHCT374 for 3-state version ¦ Input levels: ? For 74AHC273: CMOS level ? For 74AHCT273: TTL level ¦ ESD protection: ? HBM EIA/JESD22-A114E exceeds 2000 V ? MM EIA/JESD22-A115-A exceeds 200 V ? CDM EIA/JESD22-C101C exceeds 1000 V ¦ Multiple package options ¦ Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| D | ||
| 165 MHz | ||
| TSSOP | ||
| Non Inverted | ||
| 74AHC273 | ||
| null | ||
| 74AHC | ||
| 8 Channels | ||
| 20 Pins | ||
| 125 °C | ||
| -40 °C | ||
| 8 MA | ||
| null | ||
| 11 ns | ||
| null | ||
| 5.5 MV | ||
| 2 MV | ||
| 5 MV | ||
| Positive Edge |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | null |
| ECCN: | EAR99 |
| HTSN: | null |
| Schedule B: | null |
Factory Lead Time: