IS66WVC4M16EALL-7010BLI

The IS66WVC4M16EALL is an integrated memory device containing 64Mbit Pseudo Static Random Access Memory using a self-refresh DRAM array organized as 4M words by 16 bits. The device includes several power saving modes : Reduced Array Refresh mode where data is retained in a portion of the array and Temperature Controlled Refresh. Both these modes reduce standby current drain. The device can be operated in a standard asynchronous mode and high performance burst mode. The die has separate power rails, Vddq and Vddq for the I/O to be run from a separate power supply from the device core. Cellular RAM (Trademark of Micron Technology Inc.) products are high-speed, CMOS pseudo-static random access memory developed for low-power, portable applications. The 64Mb DRAM core device is organized as 4 Meg x 16 bits. This device is a variation of the industry-standard Flash control interface that dramatically increase READ/WRITE bandwidth compared with other low-power SRAM or Pseudo SRAM offerings. To operate seamlessly on a burst Flash bus, Cellular RAM products have incorporated a transparent self-refresh mechanism. The hidden refresh requires no additional support from the system memory controller and has no significant impact on device read/write performance. Two user-accessible control registers define device operation. The bus configuration register (BCR) defines how the Cellular RAM device interacts with the system memory bus and is nearly identical to its counterpart on burst mode Flash devices. The refresh configuration register (RCR) is used to control how refresh is performed on the DRAM array. These registers are automatically loaded with default settings during power-up and can be updated anytime during normal operation. Special attention has been focused on standby current consumption during self refresh. Cellular RAM products include three mechanisms to minimize standby current.

• Single device supports asynchronous , page, and burst operation
• Mixed Mode supports asynchronous write and synchronous read operation
• Dual voltage rails for optional performance:
• Vdd 1.7V to 1.95V, Vddq 1.7V to 1.95V
• Asynchronous mode read access: 70ns
  • Interpage Read access: 70ns
  • Intrapage Read access: 25ns
• Burst mode for Read and Write operation 4, 8, 16,32 or Continuous
• Low Power Consumption
  • Asynchronous Operation< 30 mA
  • Intrapage Read< 20mA
  • Burst operation < 35 mA (@104Mhz)
  • Standby< 180 uA (max)
  • Deep power-down (DPD)< 3uA (Typ)
• Low Power Feature
  • Reduced Array Refresh
  • Temperature Controlled Refresh
  • Deep power-down (DPD) mode
• Operation Frequency up to 104Mhz
• Operating temperature Range: Industrial: -40°C to 85°C
• Package: 54-ball VFBGA