AS4C4M16SA-6BAN
DRAM Chip SDRAM 64Mbit 4M X 16 54-Pin FBGA Tray
- RoHS 10 Compliant
- Tariff Charges
AS4C4M16SA-6BAN 64Mb SDRAM is a high-speed CMOS synchronous DRAM containing 64Mbits. It is internally configured as 4 Banks of 1M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to SDRAM are burst-oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a bank activate command which is then followed by a read or write command. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use. By having a programmable mode register, the system can choose most suitable modes to maximize its performance. It is well suited for applications requiring high memory bandwidth and particularly well suited to high-performance PC applications.
- Fast access time from clock: 5.4ns, fast clock rate: 166MHz, LVTTL interface
- Fully synchronous operation, AEC-Q100 compliant
- Internal pipelined architecture, 1M word x 16-bit x 4-bank
- Programmable mode registers, CAS latency: 2 or 3, burst length: 1, 2, 4, 8, or full page
- Burst type: sequential or interleaved, burst stop function
- Auto refresh and self-refresh, 4096 refresh cycles/32ms
- CKE power-down mode, single +3.3V ± 0.3V power supply
- 166MHz frequency
- 54-ball FBGA package
- Industrial temperature range from -40 to 105°C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 166 MHz | ||
| SDRAM | ||
| FBGA | ||
| Surface Mount | ||
| 4M x 16bit | ||
| 64 Mbit | ||
| MSL 3 - 168 hours | ||
| 54 | ||
| 105 °C | ||
| -40 °C | ||
| 3.3 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | null |
| ECCN: | EAR99 |
| HTSN: | 8542330001 |
| Schedule B: | 8542330000 |