The S32G family of vehicle network processors just doubled in size with today's production launch of the S32G3 series offering up to 2.5x the performance, memory and networking bandwidth as the S32G2 series. The new S32G3 processors are package pinout- and software-compatible with the S32G2 processors, allowing for a customer design to scale ~10x in performance to support multiple product tiers or increase product performance over time. The S32G family now scales from a triple dual-core lockstep microcontroller to a quad dual-core lockstep microcontroller + octal high-performance microcomputer, offering a processing range of 3.9k to 36k DMIPS.
As the automotive industry shifts to domain and zonal architectures, cross-domain functional integration drives the need for more processing and memory, as well as isolation domains for freedom from interference. The S32G3 processors address processing needs with up to four lockstep pair of Arm® Cortex®-M7 microcontroller cores and up to eight Cortex-A53 application cores (which can be optionally cluster lockstep for four pairs) and increasing the frequency by 30% to 1.3 GHz. System RAM was increased up to 20 MB to support more and larger microcontroller applications and the isolation domains were doubled to 16 domains. Additionally, to support the higher number of cores and applications, system and watchdog timers were increased.
Being vehicle network processors with network acceleration, the S32G3 network capabilities were also enhanced for higher vehicle data bandwidths. The low latency communication engine (LLCE) supports up to 5 Mbit/s CAN FD traffic on all 16 interfaces and the packet forwarding engine (PFE) supports up to 2.5 Gbit/sec on all three Ethernet interfaces.
Features
- Extend S32G family capabilities with software and pin compatibility with S32G2 processors
- Up to 8 Arm® Cortex®-A53 cores with Arm Neon™ technology organized in two clusters of four cores with optional cluster lockstep for applications and services
- Up to 4 Arm® Cortex® -M7 dual-core lockstep (DCLS) complexes for real-time applications
- Up to 20 MB of on-chip System SRAM
- Low Latency Communication Engine (LLCE) for automotive networks acceleration
- Packet Forwarding Engine (PFE) for Ethernet networks acceleration with 3 ports supporting 2.5 Gbps
- Hardware Security Engine (HSE) for secure boot and accelerated security services
- 16 isolation domains with eXtended Resource Domain Control (XRDC)
- Advanced functional safety hardware and software for ASIL D systems
- AEC-Q100 Grade 2 device: -40 °C to 105 °C
Target applications
- Central gateway
- Regional gateway/zone controller
- Body zone controller
- Power assembly domain controller
- Chassis domain controller
- Sensor data aggregation gateway
- Vehicle control execution gateway
- Service gateway/car connected gateway
- V2x control unit
- Car data recorder
- Safety Processors
- In-Vehicle Networks
Key components
- S32G399A
- VR5510
- TJA1043
- TJA1463
- TJA1153
- TJA1021
Block diagram
