Signaling the future of 5G

Wireless applications like Bluetooth, WSN and WLAN place strict requirements on chip size, module cost and power consumption. The size and manufacturing costs of transceiver systems can be minimized by integrating the entire wireless transceiver system into a single chip.

Avnet's solution is Zynq® UltraScale+™ RFSoCs which can integrate multi-gigasample RF data converters into an SoC architecture. It is the industry's single chip adaptable radio platform which can accommodate analog, digital, and embedded design. Calibration and synchronization can thus be simplified along the signal chain for high performance RF applications. No extra RF transceiver is required, doing away with the need for power-hungry FPGA-to-Analog interfaces. And up to 16 TX/RX RF channels in 5G NR RU with integrated ADC/DAC can be supported.

Features

  • Support up to 16 TX/RX RF Channels in 5G NR RU with integrated ADC / DAC
  • RF-signal processing moved to the digital domain for a fully Programmable Solution
  • Elimination of power hungry FPGA-to-Analog interfaces like JESD204 because no extra RF transceiver required. (Like ADI, TI)


Systems

  • Xilinx XCZU28DR (Gen1 under 4Ghz)
  • Xilinx XCZU39DR (Gen2 under 5Ghz)
  • Xilinx XCZU47DR (Gen3 under 6Ghz)


Target applications

  • 5G NR RU for mmWave or Sub6G
  • 5G Small Cell
  • 5G Repeater
  • Phase Array Antenna
  • Remote-PHY for Cable Access DOCSIS 3.1

 

 

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