New Product Introduction

XILINX Zynq-7000 SoCs with HW and SW programmability

Available in dual-core (Zynq-7000 devices) and single-core (Zynq-7000S devices) Cortex-A9 configurations, the Zynq-7000 family provides optimized price to performance-per-watt.

XILINX ZYNQ-7000 SOCS product image

The Zynq®-7000 All Programmable SoC family provides a fully programmable alternative to embedded systems developers, integrating the software programmability of an ARM®-based processor with the hardware programmability of an FPGA, enabling key analytics and hardware acceleration while integrating CPU, DSP, ASSP, and mixed signal functionality on a single device. Available in dual-core (Zynq-7000 devices) and single-core (Zynq-7000S devices) Cortex-A9 configurations, the Zynq-7000 family provides optimized price to performance-per-watt. 

 

Key features

  • Dual or Single-core ARM Cortex-A9 with CoreSight™ Technology
  • Large and High-Performance Memory System
  • Xilinx 28nm Programmable Logic
  • Integrated Memory Mapped Peripherals

 

Additional features

Dual- or Single-core ARM Cortex-A9 with CoreSight™ Technology

  • ARM Cortex-A9 processor chosen for optimal performance-per watt ratio in popular applications
  • Single and double-precision floating point support
  • Up to 1GHz operation

Large and High-Performance Memory System

  • 512KB L2 Cache
  • 256KB On-Chip Memory fits an entire real-time operating system
  • Integrated memory controllers support up to DDR3-1866

Xilinx 28nm Programmable Logic

  • Artix FPGA fabric for low power and low cost
  • Kintex FPGA fabric for optimal price/performance/watt

Integrated Memory Mapped Peripherals

  • 2x USB 2.0 (OTG) w/DMA
  • 2x Tri-mode Gigabit Ethernet w/DMA
  • 2x SD/SDIO w/DMA
  • 2x UART, 2x CAN 2.0B, 2x I2C, 2x SPI, 32b GPIO

All Programmable Power Management

  • Flexible, tunable power envelope for adjustable processor, interconnect, and memory speeds
  • ARM low power modes
  • Partial reconfiguration to reduce programmable logic requirement

AMBA Open Standard Interconnect Ports

  • 64-bit AXI ACP port for enhanced hardware acceleration and cache coherency for additional soft processors
  • Up to 100Gb/s bandwidth between PS and PL

Massive Parallel Signal Processing

  • Dedicated, full custom, low-power DSP slices
  • Up to 2,020 DSP blocks delivering over 2,662 GMACs

 

Applications

  • ARM® Cortex™-A9 for advanced metadata handling
  • Flexibility to support multiple sensors and connectivity
  • Increase design productivity with C-based design flow
  • Higher performance and reduced power consumption
  • Single-chip design for higher reliability
  • Full suite of production ready IP
  • Embedded processing and programmable logic on a single chip
  • Allows for “right-sizing” of HW platforms in terms of cost
  • Eliminate chip-to-chip data bandwidth issues that plague
  • ADAS-specific development kits

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