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RF sampling: frequency planning yields a clean spectrum – From Texas Instruments

You think your radio frequency (RF) sampling design is well in hand because you selected the proper device and defined the clock source. But wait; you are not done. Even the best devices introduce degradation without proper frequency planning to ensure a clean spectrum from harmonics or clock-mixing spurs. Frequency planning has always been a part of good transceiver design, but it is more critical with RF sampling because the signals are already at the frequency band of interest. The RF sampling architecture does not have narrowband channel filtering to clean the spectrum like other configurations with an intermediate frequency (IF) or baseband (BB) stage.

In the transmitter, regulatory requirements restrict the level of spurious products that fall within the band of interest and just outside the band. These spurious products created in the converter cannot be filtered effectively before they reach the power amplifier (PA). Once radiated these products potentially interfere with other users.

Frequency planning with an RF sampling digital-to-analog converter (DAC) ensures that harmonic content folding back into the first Nyquist zone is not within or near the band of interest. The frequency band for a given application is fixed; it is not adjustable, but you can adjust the sample rate of the converter. Increasing the sampling rate creates a larger Nyquist zone; however, that does not guarantee an optimal plan.

Transmitter frequency planning example

Look at an example of a transmitter operating in the 2.14GHz band with a 60MHz-wide signal. Figure 1a depicts the first Nyquist zone spectrum with a high-frequency clock rate of 8,024MHz. With this rate, the desired band (highlighted in blue) is clear, but third- and fifth-order harmonics as well as known clock-mixing spurs (highlighted in yellow) are located close to the band of interest. These spurious products would be difficult to filter.

Figure 1b shows the same band with a reduced clock rate of 5,683.2MHz. With this clock rate, none of the high-order harmonics nor the clock-mixing spurs are located close to the desired band of interest. In this example, the lower sampling-rate approach is preferable because you can easily filter the high-order spurs.

(a) (b)

Figure 1: Spectrum chart with 8,024MHz (a) and 5,683.2MHz clocks (b)

Receiver frequency planning example

The frequency-planning goal for the receiver is slightly different. Interference derived from in-band and out-of-band signals significantly impacts receiver sensitivity. You can minimize out-of-band interferers from other users’ signals or from transmitter bleedthrough with proper band-limiting filtering on the RF input. You cannot filter in-band interferers. Frequency planning ensures that harmonic content from in-band interferers does not fold back within the band of interest. Unlike the transmitter case, harmonic content that folds back just outside the band is not a problem.

Figure 2 shows an example with a 100MHz-wide signal operating within a band centered at 1,950MHz. The clock frequency is 6,144MHz. With this configuration, all of the higher-order harmonics are outside the band. The second and fourth harmonics are close, but not within the band. A traditional low-IF architecture cannot compete. The lower sampling rate analog-to-digital converter (ADC) operating with the same signal bandwidth cannot achieve a clean spectrum because the folded-back harmonics cover the entire Nyquist zone.

Figure 2: Spectrum chart of a 100MHz-wide band centered at 1,950MHz with a 6,144MHz clock


You can modify the clock frequency to maintain a clean spectrum as the frequency band of interest changes. With traditional architectures, adjusting the frequency planning required you to modify synthesizers and IF or baseband filter stages. The RF sampling architecture allows simple frequency-planning modifications by only adjusting the sampling rate. Since operating in different bands only requires a clock-frequency adjustment, the RF sampling architecture is easily adaptable to different frequency bands and applications.

Next month, I will discuss the clocking requirements for RF sampling ADCs. Let me know what other topics you’d like to learn about designing with RF sampling converters by posting a comment below.

Contributed by Texas Instruments

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