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Software-Defined Radio with PicoZed™ SDR SpeedWay Workshop 2015

01 Apr 2016 - 31 Dec 2017

Technical Webcast


Software-Defined Radio with PicoZed™ SDR SpeedWay Workshop 2015

This application-specific course presents selected topics in wireless communications with the Avnet PicoZed SDR Software-Defined Radio Development Kit. System-level design techniques are used to model the entire signal chain from RF to baseband within Analog Devices AD9361 agile RF transceiver and Xilinx Zynq® All-Programmable SoC. Hands-on labs progress though the essential components of modern wireless communication systems using MATLAB® and Simulink® for simulation, code generation and real-time data acquisition with over-the-air testing.

Day 1 AM Lab: AD9361 System-Level Model Lab

This lab uses a simulation model of the Analog Devices RadioVerse™ AD9361 Wideband Low Power RF transceiver on PicoZed SDR to explore user options for tuning device parameters to meet system requirements for RF performance. During this lab you will gain an understanding of the receiver portion of the AD9361, familiarize yourself with Simulink® for system modeling and simulation, explore the RF modeling and simulation capabilities of SimRF™, and learn how to customize transceiver behavior through the use of the AD9361 Filter Wizard application.

 

Day 1 PM Lecture: Prototyping and Testing with PicoZed SDR

This lecture focuses on prototyping with PicoZed SDR for fast proof of concept of wireless communications algorithms using MATLAB and Simulink from MathWorks. System designers will learn to use PicoZed SDR as the RF front-end for over-the-air capture of real-world analog signals for streaming to Simulink over Ethernet using Zynq SDR Support from Communications System Toolbox.

 

Day 1 PM Lab: QPSK Receiver with Radio-in-the-Loop

Step-by-step validation of a QPSK receiver as a device under test (DUT), modeled within MATLAB and Simulink on the host PC, with ‘live’ RF carrier-modulated traffic from the AD9361 as input stimulus. For a signal source, recorded QPSK baseband data stored in DDR3 memory of PicoZed SDR is repeatedly transmitted without gaps through the AD9361 RF front-end. This RF signal is looped-back through the AD9361 RX to be digitized and sent over Ethernet as I&Q baseband signals from PicoZed SDR to the QPSK receiver DUT running in Simulink on the PC. This methodology serves to validate the AD9361 front-end while allowing incremental refinements of the DUT model in the presence of ‘real-world’ signals.

 

Day 2 AM Lab: Integrating a QPSK Receiver into PicoZed SDR

Step-by-step procedure using an automated workflow within Simulink to generate an IP core from a hardware-optimized QPSK receiver model, and integration into a Vivado-based board support package custom-made for PicoZed SDR. The design is compiled to a bitstream, exported to Xilinx Software Development Kit (SDK) and all necessary files created to boot PicoZed SDR for stand-alone operation as a QPSK receiver.

 

Day 2 PM Lecture: Product Deployment with PicoZed SDR

This lecture demonstrates live usage of PicoZed SDR running UBUNTU Linux desktop on the ARM® Cortex™-A9 processing system (PS) of the Zynq®-7000 All Programmable SoC. Topics include Analog Devices IIO Oscilloscope for display of captured RF-modulated QPSK data in the frequency domain and constellation plot, remote update of user-space tools in the Linux root file-system, ZYNQ boot files and Linux kernel in the FAT32 BOOT partition.

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software-defined-radio-picozed-sdr-speedway-workshop-2015

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