NXP LPC55xx hands-on training

22 Oct 2019 - 26 Nov 2019

pan-European, multiple locations


NXP
 

Avnet Silica and NXP are inviting you to discover the new LPC5500 MCUs.

You will have the opportunity to assist to presentations and run hands-on trainings around the World’s First Arm® Cortex®-M33 based Microcontroller Series.

The LPC5500 MCU Series leverages the most recent Arm® Cortex®-M33 technology, combining significant product architecture enhancements and greater integration over previous generations; offering dramatic power consumption improvements and advanced security features including SRAM PUF based root of trust and provisioning, real time execution from encrypted images (internal flash), and asset protection with Arm TrustZone-M. 

In addition, the LPC5500 MCU series provides a comprehensive offering and several scalability options with seven families that will be introduced over the next six months, all of which benefit from 40nm cost advantages, broad scalable packages and memory options, as well as a robust enablement including MCUXpresso Software and Tools ecosystem and low-cost development boards.

During the training you will run labs on the LPC55S69-EVK Evaluation Kit, with the free of charge IDE, MCUXpresso

N.B.
All attendees need to bring their own PC, with administrator rights (standard x86, with 4GB RAM minimum, 1.5GB of available disk space - Microsoft® Windows 7, 8.1, 10 - 32-bit and 64-bit are supported) with the latest version of the MCUXpresso IDE pre-installed (MCUXpresso IDE v10.3.1 or later).
You can download tools here:
www.nxp.com/mcuxpresso/ide

 

JUMP TO REGISTRATION
 

Date & venues

Date Location
22 October 2019 Warszawa, Poland (Golden Tulip Warsaw Centre, Towarowa 2, Warszawa)
24 October 2019 Kraków, Poland (Metropolo Krakow by Golden Tulip, Orzechowa 11, Kraków)
31 October 2019 Asker, Norway (Avnet Silica, Våre lokale i Solbråv 45, 1383 Asker)
26 November 2019 Prague, Czech Republic (Avnet Silica, Amazon Court, Karolinska 661/4, Prague )

 

Agenda

08:30 Welcome and registration
09:00 NXP MCU/MPU strategy
09:15 LPC 55xx & Cortex M33 Trustzone Technical Overview
10:45 LAB 1 – Getting Started with LPC55S69-EVK, MCUXpresso and SDK for LPC55xx (pre-installation is requested)
11:15 Break
11:30 LAB 2 - Trustzone Hands-on (Secure bus control, Secure GPIO, Secure Faults
13:00 Lunch
13:45 LAB 3 - Dual-core debug/communication
14:45 LPC55xx - Specific Security Features Overview
15:45 DEMO - Secure boot Intro + secure boot hands on
16:15 LPC55xx PowerQuad Overview
16:45 LPC55xx Low Power Modes + Performance benchmark Coremark
17:15 Q&A

 

Seminar fee

Free of charge

 

Registration

 

 

NXP LPC55xx hands-on training | Avnet Silica

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