NXP LPC55xx hands-on training
08 May 2019 - 12 Jun 2019
pan-European, multiple locations
Avnet Silica and NXP are inviting you to discover the new LPC5500 MCUs.
You will have the opportunity to assist to presentations and run hands-on trainings around the World’s First Arm® Cortex®-M33 based Microcontroller Series.
The LPC5500 MCU Series leverages the most recent Arm® Cortex®-M33 technology, combining significant product architecture enhancements and greater integration over previous generations; offering dramatic power consumption improvements and advanced security features including SRAM PUF based root of trust and provisioning, real time execution from encrypted images (internal flash), and asset protection with Arm TrustZone-M.
In addition, the LPC5500 MCU series provides a comprehensive offering and several scalability options with seven families that will be introduced over the next six months, all of which benefit from 40nm cost advantages, broad scalable packages and memory options, as well as a robust enablement including MCUXpresso Software and Tools ecosystem and low-cost development boards.
During the training you will run labs on the LPC55S69-EVK Evaluation Kit, with the free of charge IDE, MCUXpresso.
All attendees need to bring their own PC, with administrator rights (standard x86, with 4GB RAM minimum, 1.5GB of available disk space - Microsoft® Windows 7, 8.1, 10 - 32-bit and 64-bit are supported) with the latest version of the MCUXpresso IDE pre-installed (MCUXpresso IDE v10.3.1 or later).
You can download tools here: www.nxp.com/mcuxpresso/ide
Date & venues
|23 April 2019||Madrid (Hotel Meliá Barajas, Av. de Logroño, 305, 28042 Madrid)||closed|
|25 April 2019||Barcelona ((Hotel Catalonia Barcelona Plaza, Pl. Espanya 6-8, 08014 Barcelona)||closed|
|08 May 2019||Milan, Italy (Avnet EMG Italy Srl, Via Manzoni 44, 20095 Cusano Milanino MI)||closed|
|09 May 2019||Bologna, Italy (Novotel Bologna Fiera, Via Michelino 73, 40127 Bologna)||closed|
|10 May 2019||Padua, Italy (Four Points by Sheraton, Corso Argentina, 5, 35129 Padova)||closed|
|16 May 2019||Asse, Belgium (Hof ten Eenhoorn Keierberg 80, 1730 Asse)||closed|
|28 May 2019||Asker, Norway (Avnet Silica Office, Våre lokale i Solbråv 45, 1383 Asker)||closed|
|04 June 2019||Lyon, France (Avnet Silica, Parc Club du Moulin à vent, Bâtiment 10, Rez-de-chaussée, 33 rue du Dr. G. Levy, 69200 Venissieux)||closed|
|05 June 2019||Breda, Netherlands (Avnet Silica Offices, Stadionstraat 2, 4815 NG Breda)||closed|
|12 June 2019||Wiesbaden, Germany (Avnet EMG GmbH, Borsigstr. 32, 65205 Wiesbaden)||Register now|
|25 June 2019||Rothrist, Switzerland (Avnet EMG AG, Rössliweg 29b, 4852 Rothrist)||Register now|
|26 June 2019||Leinfelden (Stuttgart area), Germany (Avnet EMG GmbH, Gutenbergstraße 15, 70771 Leinfelden-Echterdingen)||Register now|
|26 June 2019||Bilbao (Hotel Seminario, Larrauri Kalea, 1, 48160 Derio, Bizkaia)||Register now|
|27 June 2019||Poing (Munich area), Germany (Avnet EMG GmbH, Gruber Str. 60 C-D, 85586 Poing)||Register now|
|08:30||Welcome and registration|
|09:00||NXP MCU/MPU strategy|
|09:30||LPC 55xx & Cortex M33 Trustzone Technical Overview|
|10:45||LAB 1 – Getting Started with LPC55S69-EVK, MCUXpresso and SDK for LPC55xx (pre-installation is requested)|
|11:30||LAB 2 - Trustzone Hands-on (Secure bus control, Secure GPIO, Secure Faults|
|13:45||LAB 3 - Dual-core debug/communication|
|14:45||LPC55xx - Specific Security Features Overview|
|15:45||DEMO - Secure boot Intro + secure boot hands on|
|16:15||LPC55xx PowerQuad Overview|
|16:45||LPC55xx Low Power Modes + Performance benchmark Coremark|
|17:15||Questionnaire – end|
Free of charge
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