Webinar: Infineon DC/DC PMIC for FPGAs/SoCs for 10W to 50W Applications
30 Jun 2018 - 30 Jun 2019
Online, on demand
Infineon offers a set of complete power supply reference designs for Xilinx FPGAs & SoCs/MPSoC, highly optimized for flexible design. Join this webinar to learn how to select the best power device for Xilinx FPGAs based on the provided tools and software from Avnet Silica.
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Simplicity, efficiency, reduced system size, smaller bills of material and lower Total Owner Cost: topics with whom we are confronted in our daily working lives. An elegant response to these challenges is provided by the integrated power solutions from Infineon.
Target applications include servers, storage, routers and switches, telecom base stations, digital home media, microprocessor units, field-programmable gate arrays, as well System on a Chip solutions used for mobile computing and embedded data processing. Depending on computational power, this target application may require supply currents from a few 100 mA to currents in the multiple 10 A - 50 A ranges.
Attendees of this presentation will learn how easy and simple it is, with the modern tools from Infineon, to find an easy-to-use, fully integrated and highly efficient power supply solution for the FPGAs and MPSoCs families from Xilinx.
In addition to introducing the reliability requirements of powering modern FPGAs and MPSoCs, we show you how to estimate the power consumption of the target device and how to deliver this with the latest PMICs from Infineon. Furthermore, you will get an insight into to the tool landscape and a practical example implementation as a starting point for your work.
- Learn to simplify your BOM by replacing many of your standard regulators with one Infineon PMIC
- Learn how updating to Xilinx newest recommendations for rail power consolidation leads to best integration and use case
- Discover how to re-use your power design to cover your complete set of application with FPGAs/SoCs and ASICs
- Lower total solution cost by high level integration and component reduction (35% board area reduction)
- Tony Ochoa, Senior Technical Marketing Engineer, Infineon Technologies
- Udo Blaga, Senior Field Application Engineer, Avnet Silica
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