Title

Subtitle

 

This is a test page

Location MPSoC Hardware MPSoC Software PetaLinux Xilinx SDSoC Deep Learning
BELGIUM
Berlin 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Stuttgart 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Hannover 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Munich 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Bochum 26 November, 2019 27 November, 2019   06 November, 2019 07 November, 2019
EASTERN EUROPE REGION
Berlin 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Stuttgart 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Hannover 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Munich 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Bochum 26 November, 2019 27 November, 2019   06 November, 2019 07 November, 2019
FRANCE
Berlin 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Stuttgart 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Hannover 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Munich 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Bochum 26 November, 2019 27 November, 2019   06 November, 2019 07 November, 2019
GERMANY
Berlin 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Stuttgart 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Hannover 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Munich 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Bochum 26 November, 2019 27 November, 2019   06 November, 2019 07 November, 2019
ITALY
Berlin 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Stuttgart 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Hannover 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Munich 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Bochum 26 November, 2019 27 November, 2019   06 November, 2019 07 November, 2019
NORDICS REGION
Berlin 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Stuttgart 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Hannover 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Munich 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Bochum 26 November, 2019 27 November, 2019   06 November, 2019 07 November, 2019
SPAIN
Berlin 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Stuttgart 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Hannover 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Munich 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Bochum 26 November, 2019 27 November, 2019   06 November, 2019 07 November, 2019
UK and Ireland
Berlin 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Stuttgart 05 November, 2019 06 November, 2019 07 November, 2019 06 November, 2019 07 November, 2019
Hannover 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Munich 12 November, 2019 13 November, 2019   06 November, 2019 07 November, 2019
Bochum 26 November, 2019 27 November, 2019   06 November, 2019 07 November, 2019

Developing Zynq UltraScale+ MPSoC Software, with Xilinx Software Development Kit 2018.3

This course explores the basic fundamentals in the Xilinx Software Development Kit (SDK). Using a pre-built hardware platform, you will learn how to navigate the SDK environment and develop some basic C-code examples for the Ultra96 / Ultra96-V2 board.

Highlights

  • Introduce developers to the Xilinx SDK
  • Explore how to import hardware into your Xilinx SDK environment
  • Connect the SDK to hardware for execution and debug
  • Utilize a peripheral interrupt to show real-time software response
  • Show a basic example of how to use an external sensor module

 

Developing Zynq UltraScale+ MPSoC Hardware, with Xilinx Vivado 2018.3

This course will teach you how to develop a Zynq UltraScale+ MPSoC hardware platform using the Xilinx Vivado tools while also learning the ZU+ architecture. Vivado is used to configure the processing system parameters, including clocking, memory interface, and peripherals. Vivado is also used to develop custom hardware in the programmable logic. Build a working hardware platform that runs your code on the Ultra96 / Ultra96-V2 board.

Highlights

  • Introduction to the Zynq UltraScale+ MPSoC development flow with Vivado’s IP Integrator
  • Introduction to the Zynq UltraScale+ MPSoC Architecture including the ARM Cortex™-A53 Processor
  • Utilize the Xilinx embedded systems tools to
    • Design a Zynq UltraScale+ MPSoC system
    • Add Xilinx and custom IP
    • Run software applications to test the IP
    • Debug an embedded system

Prerequisites

  • Developing Zynq UltraScale+ MPSoC Software course or applicable experience

 

Integrating Sensors on Ultra96 with PetaLinux 2018.3

From within an Ubuntu OS running within a virtual machine, learn how to install PetaLinux and build embedded Linux targeting Ultra96 or Ultra96-V2. In the hands-on labs learn about Yocto and PetaLinux tools to import your own FPGA hardware design, integrate user space applications, and configure/customize PetaLinux.

Highlights

  • Build, customized and configure PetaLinux for Ultra96
  • Import existing Vivado hardware designs into PetaLinux
  • Add custom applications into PetaLinux

Prerequisites

  • Developing Zynq UltraScale+ MPSoC Software course or applicable experience

 

Avnet hardware required to complete the labs for all Introductory Courses
- Ultra96 Development Board (AES-ULTRA96-G or AES-ULTRA96-V2-G)
- Ultra96 USB-JTAG/UART Pod (AES-ACC-U96-JTAG)
- Power Supply (AES-ACC-U96-4APWR)
- Click Mezzanine Bundle (AES-ACC-U96-ME-SK)

 

Attendees also need the following

- Laptop with Ubuntu Virtual Machine with Xilinx SDSoC 2018.3 Suite installed

- Micro-USB cable 

- USB-to-SD Card reader is highly recommended

 

A Practical Guide to Getting Started with Xilinx SDSoC 2018.3

Using proven flows for SDSoC, you will learn how to navigate SDSoC. On the first day, through hands-on labs, we will create a design for a provided platform and then also create a platform for the Avnet Ultra96. You will see how to accelerate an algorithm in the course lab. On the second day, a similar workflow is taken.  This time focusing on PetaLinux integration, while leveraging the knowledge we built from the first day.  This experience should give you the background to assist you in developing custom platforms with custom algorithms, accelerated by SDSoC.

Highlights

  • Introduction to the design concepts and problem-solving techniques of SDSoC
  • Build the bare metal platform from scratch
  • Enable and test a PetaLinux BSP running on the Ultra96 Development Board
  • Test the platform using a simple Matrix Multiplier

Prerequisites

  • A working knowledge of Xilinx Vivado, SDK, and PetaLinux design tools and flow
  • Or, attendance at our other three fundamentals courses (live or on-demand)   
  • Experience with the v2018.3 tools is recommended but not required

 

Introduction to Deep Learning with Xilinx SoCs

Deep learning achieves human-like accuracy for many tasks considered algorithmically unsolvable with traditional machine learning. It is frequently used to develop applications such as face recognition, automated driving, and image classification.

Introduction to Deep Learning with Xilinx SoCs is a two-day technical training course that provides a hands-on introduction to deep learning, from training to inference.  The Deep Learning toolbox from the MathWorks is used to provide an interactive introduction to deep learning, including workflows for creating and training Deep Neural Networks (DNN) from scratch, as well as with transfer learning.  The Xilinx Edge AI Inference solution is used to deploy the DNN for inference on the Xilinx MPSoC (Ultra96).

Highlights

Day 1 - Deep learning overview and training with MathWorks

  • Use pre-trained DNNs for image classification
  • Manage collections of data for deep learning
  • Create and train a DNN from scratch for digit classification
  • Use transfer learning to modify a pre-trained network to classify images into specified classes

Day 2 - Deep learning inference on Xilinx SoCs

  • Overview of Xilinx's AI inference solutions, from cloud to edge
  • Deep dive into the development flow for Xilinx edge AI platforms
  • Quantize, compile, and deploy DNNs to the Ultra96

Prerequisites

  • PetaLinux Tools for Ultra96 Development or applicable experience

 

Avnet hardware required for Advanced Courses
- Ultra96 Development Board (AES-ULTRA96-G or AES-ULTRA96-V2-G)
- Ultra96 USB-JTAG/UART Pod (AES-ACC-U96-JTAG)
- Power Supply (AES-ACC-U96-4APWR)

 

Attendees also need the following

- Laptop with Xilinx Vivado Design Suite 2018.3 installed
- Micro-USB cable 68)

 

For the Deep Learning course attendees will also need

- Laptop with Linux Virtual Machine installed
- Xilinx SDSoC Design Suite 2018.3 installed under Linux
- USB-to-SD Card reader is highly recommended
- USB camera, one of the following recommended:

  • Logitech BRIO
  • Logitech C920
  • Logitech C270

 

Please fill out the form below
 

Cost:

All courses are 90 €uro each. 


Can’t attend in person? Take the courses online at Hackster.io here